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型號(hào)：	MB90V560CR
廠商：	FUJITSU LTD
元件分類(lèi)：	微控制器/微處理器
英文描述：	16-BIT, 8 MHz, MICROCONTROLLER, CPGA256
封裝：	PGA-256
文件頁(yè)數(shù)：	461/616頁(yè)
文件大小：	15240K
代理商：	MB90V560CR

20.5 Confirming the Automatic Algorithm Execution State

20.5.3 Timing Limit Exceeded Flag (DQ5)

The timing limit exceeded flag (DQ5) is used to post that execution of the automatic

algorithm has exceeded the time (internal pulse count) prescribed in the flash memory.

s Timing Limit Exceeded Flag (DQ5)

Table 20.5-7 "Timing Limit Exceeded Flag State Transitions (state change for normal

operation)" and Table 20.5-8 "Timing Limit Exceeded Bit Flag State Transitions (state change

for abnormal operation)" list the state transitions of the timing limit exceeded flag.

r Write/chip sector erase

Read-access after write or chip/sector erase automatic algorithm activation causes the flash

memory to output 0 if the time is within the prescribed time (time required for write/erase) or to

output 1 if the prescribed time has been exceeded. Because this is done regardless of whether

the automatic algorithm is being executed or has terminated, it is possible to determine whether

write/erase was successful or unsuccessful. That is, when this flag outputs 1, writing can be

determined to have been unsuccessful if the automatic algorithm is still being executed by the

data polling function or toggle bit function.

For example, writing 1 to a flash memory address where 0 has been written will cause the fail

state to occur. In this case, the flash memory will lock and execution of the automatic algorithm

will not terminate. As a result, valid data will not be output from the data polling flag (DQ7). In

addition, the toggle bit flag (DQ6) will exceed the time limit without stopping the toggle operation

and the timing limit exceeded flag (DQ5) will output 1. Note that this state indicates that the

flash memory is not faulty, but has been used correctly. When this state occurs, execute the

Reset command.

Table 20.5-7 Timing Limit Exceeded Flag State Transitions (state change for normal operation)

Operating

Write -->

Completed

Chip/sector

erase -->

Completed

Sector erase

wait -->

Sector erase

--> Erase

(sector being

Sector erase

suspend -->

Restarted

(sector being

Sector erase

suspended

(sector not

being erased)

0 --> DATA:5

Table 20.5-8 Timing Limit Exceeded Bit Flag State Transitions (state change for

abnormal operation)

Operating state

Chip/sector erase

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