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CHAPTER 12 MULTIFUNCTIONAL TIMERS
12.4.4 8/16-Bit PPG Timer
The 8/16-bit PPG timer has three operation modes; 8-bit PPG mode, 8-bit prescaler + 8-
bit PPG mode, and 16-bit PPG mode.
This section explains channels 0 and 1 of the 8/16-bit PPG timer. For channels 2 and 3
of the 8/16-bit PPG timer, replace channel 0 with channel 2 and channel 1 with channel
3. For channels 4 and 5 of the 8/16-bit PPG timer, replace channel 0 with channel 4 and
channel 1 with channel 5.
s Operation of 8/16-Bit PPG Timer
Each channel of the 8-bit PPG unit has an 8-bit PPG reload register (upper) (PRLH) and an 8-
bit PPG reload register (lower) (PRLL).
Values written into these registers are alternately
reloaded from the upper side/lower side reload register into the 8-bit down-counter (PCNT) and
counted down in synchronization with the count clock. The polarity of the pin output (PPG0 to
PPG5 pin) is inverted during reloading by a counter underflow. This operation enables the pin
output (PPG pin) to become the pulses with the "H"/"L" width associated with the PPG reload
register (PRLH, PRLL) value.
Since the output polarity can be set by software, pin output can easily be inverted. Operation is
started by setting the PPG control register or entering "H" of the GATE signal.
When PPGC:SST1 and SST0 are set to "0", setting PPGC1:PEN1 and PPGC0:PEN0 to "1"
starts operation.
When PPGC:SST1 and SST0 are set to "1", operation starts when the GATE signals turn to
"H" and continues for the period during which the signal is at the "H" level.
When PPGC:PIE0 and PIE1 are set to "1", an interrupt request is output by an underflow ("00H"
-> "FFH": 8-bit PPG mode, "0000H" -> "FFFFH": 16-bit PPG mode) of the counter value of each
channel.
Table 12.4-1 Relationship between Reload Operation and Pulse Output
Reload operation
Pin output transition
Positive polarity mode
Negative polarity mode
PRLH --> PCNT
PPG0/1
[0-->1]
Rise
PPG0/1
[1-->0]
Fall
PRLL --> PCNT
PPG0/1
[1-->0]
Fall
PPG0/1
[0-->1]
Rise