
566
APPENDIX B Instructions
table.
Note:
Count Correction Values for Counting Execution Cycles" for information on (a) to (d) in the
table.
Table B.8-15 31 28 Other Control Instructions (byte, word, long word)
Mnemonic
#
RG
B
Operation
L
H
A
H
I
S
TN
ZV
C
R
M
W
PUSHW
A
AH
PS
rlst
1
2
4
*3
0
+&
(c)
*4
word (SP) <-- (SP) - 2 , ((SP)) <-- (A)
word (SP) <-- (SP) - 2 , ((SP)) <-- (AH)
word (SP) <-- (SP) - 2 , ((SP)) <-- (PS)
(SP) <-- (SP) - 2n , ((SP)) <-- (rlst)
-
POPW
A
AH
PS
rlst
1
2
3
4
*2
0
+&
(c)
*4
word (A) <-- ((SP)) , (SP) <-- (SP) + 2
word (AH) <-- ((SP)) , (SP) <-- (SP) + 2
word (PS) <-- ((SP)) , (SP) <-- (SP) + 2
(rlst) <-- ((SP)) , (SP) <-- (SP)
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
JCTX
@A
1
14
0
6×(c)
Context switch instruction
-
*
*****-
AND
OR
CCR,#imm8
2
3
0
byte (CCR) <-- (CCR) and imm8
byte(CCR) <-- (CCR) or imm8
-
*
-
MOV
RP,#imm8
ILM,#imm8
2
0
byte (RP) <-- imm8
byte (ILM) <-- imm8
-
MOVEA
RWi,ear
RWi,eam
A,ear
A,eam
2
2+
2
2+
3
2+(a)
1
1+(a)
1
0
word (RWi) <-- ear
word (RWi) <-- eam
word (A) <-- ear
word (A) <-- eam
-
*
-
ADDSP
#imm8
#imm16
2
3
0
word (SP) <-- ext(imm8)
word (SP) <-- imm16
-
MOV
A,brg1
brg2,A
2
*1
1
0
byte (A) <-- (brg1)
byte (brg2) <-- (A)
Z
-
*
-
*
-
NOP
ADB
DTB
PCB
SPB
NCC
CMR
1
0
No operation
Prefix code for AD space access
Prefix code for DT space access
Prefix code for PC space access
Prefix code for SP space access
Prefix code for flag no-change
Prefix code for common register bank
-
*1: PCB, ADB, SSB, USB, SPB: 1, DTB, DPR: 2
*2: 7 + 3×(POP count) + 2×(POP last register number), 7 when RLST = 0 (no transfer register)
*3: 29 + 3×(PUSH count) - 3×(PUSH last register number), 8 when RLST = 0 (no transfer register)
*4: (POP count)×(c) or (PUSH count)×(c)