參數(shù)資料
型號: ISP1761
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus On-The-Go controller
中文描述: 高速通用串行總線和On - The - Go控制器
文件頁數(shù): 87/158頁
文件大?。?/td> 724K
代理商: ISP1761
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
87 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
7. The B-device turns on its pull-up.
8. After waiting 30
μ
s to ensure that the DP line is not HIGH because of the residual
effect of the A-device pull-up, the A-device notices that the DP-line is HIGH and the
DM line is LOW, indicating that the B-device is signaling a connect and is ready to
respond as a peripheral. At this point, the A-device becomes a host and asserts the
bus reset to start using the bus.
9.4.2
OTG state diagrams
Figure 15
and
Figure 16
show the state diagrams for the dual-role A-device and the
dual-role B-device, respectively. For a detailed explanation, refer to On-The-Go
Supplement to the USB 2.0 Specification Rev. 1.0a
The OTG state machine is implemented with software. The inputs to the state machine
come from four sources: hardware signals from the USB bus, software signals from the
application program, internal variables with the state machines, and timers:
Hardware inputs: Include id, a_vbus_vld, a_sess_vld, b_sess_vld, b_sess_end,
a_conn, b_conn, a_bus_suspend, b_bus_suspend, a_bus_resume, b_bus_resume,
a_srp_det and b_se0_srp. All these inputs can be derived from the OTG Interrupt and
OTG Status registers.
Software inputs: Include a_bus_req, a_bus_drop and b_bus_req.
Internal variables: Include a_set_b_hnp_en, b_hnp_enable and b_srp_done.
Timers: The HNP state machine uses four timers: a_wait_vrise_tmr,
a_wait_bcon_tmr, a_aidl_bdis_tmr and b_ase0_brst, tmr. All timers are started on
entry to and reset on exit from their associated states. The ISP1761 provides a
programmable timer that can be used as any of these four timers.
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