參數(shù)資料
型號(hào): ISP1761
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus On-The-Go controller
中文描述: 高速通用串行總線和On - The - Go控制器
文件頁(yè)數(shù): 24/158頁(yè)
文件大小: 724K
代理商: ISP1761
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)當(dāng)前第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
24 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
With the help of the IRQ Mask AND and IRQ Mask OR registers for each type of
transfer— ISO, INT and bulk—software can determine which PTDs get priority and an
interrupt will be generated when the AND or OR conditions are met. The PTDs that are
set will wait until the respective bits of the remaining PTDs are set and then all PTDs
generate an interrupt request to the CPU together.
The registers definition shows that the AND or OR conditions are applicable to the same
category of PTDs—ISO, INT and ATL.
When an IRQ is generated, the PTD Done Map registers and the respective V bits will
show which PTDs were completed.
The rules that apply to the IRQ Mask AND or IRQ Mask OR settings are:
The OR mask has a higher priority over the AND mask. An IRQ is generated if bit n of
done map is set and the corresponding bit n of the OR mask register is set.
If the OR mask for any done bit is not set, then the AND mask comes into picture. An
IRQ is generated if all the corresponding done bits of the AND Mask register are set.
For example: If bits 2, 4 and 10 are set in the AND Mask register, an IRQ is generated
only if bits 2, 4, 10 of the done map are set.
If using the IRQ interval setting for the bulk PTD, an interrupt will only occur at the
regular time interval as programmed in the ATL Done Timeout register. Even if an
interrupt event occurs before the timeout of the register, no IRQ will be generated until
the time is up.
For an example on using the IRQ Mask AND or IRQ Mask OR registers, without the ATL
Done Timeout register, see
Table 5
.
The AND function: activate the IRQ only if PTDs 1, 2 and 4 are done.
The OR function: if any of the PTDs 7, 8 or 9 are done, an IRQ for each of the PTD will be
raised.
7.5 Phase-Locked Loop (PLL) clock multiplier
The internal PLL requires a 12 MHz input, which can be a 12 MHz crystal or a 12 MHz
clock already existing in the system with a precision better than 50 ppm. This allows the
use of a low-cost 12 MHz crystal that also minimizes Electro-Magnetic Interference (EMI).
When an external crystal is used, make sure the CLKIN pin is connected to V
CC(I/O)
.
Table 5:
PTD
1
2
3
4
5
6
7
8
9
Using the IRQ Mask AND or IRQ Mask OR registers
AND register
OR register
1
0
1
0
0
0
1
0
0
0
0
0
0
1
0
1
0
1
Time
1 ms
-
-
3 ms
-
-
5 ms
6 ms
7 ms
PTD done
1
1
-
1
-
-
1
1
1
IRQ
-
-
-
active because of AND
-
-
active because of OR
active because of OR
active because of OR
相關(guān)PDF資料
PDF描述
ISP1761BE Hi-Speed Universal Serial Bus On-The-Go controller
ISP1761ET Hi-Speed Universal Serial Bus On-The-Go controller
ISP2100A Telecommunication IC
ISP2100BN4 Microprocessor
ISP2300 Controller Miscellaneous - Datasheet Reference
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1761BE 功能描述:USB 接口集成電路 USB HS OTG CTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,518 功能描述:USB 接口集成電路 USB HS OTG CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,557 功能描述:USB 接口集成電路 USB HS OTG CTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE518 制造商:ST-Ericsson 功能描述:IC CONTROLLER USB OTG 128LQFP