參數(shù)資料
型號: ISP1761
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus On-The-Go controller
中文描述: 高速通用串行總線和On - The - Go控制器
文件頁數(shù): 8/158頁
文件大?。?/td> 724K
代理商: ISP1761
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
8 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
DP2
PSW2_N
27
28
M2
M1
AI/O
OD
downstream data plus port 2
power switch port 2, active LOW
output pad, push-pull open-drain, 8 mA output drive, 5 V tolerant
RREF3 ground
reference resistor connection; connect a 12 k
±
1 % resistor
between this pin and the RREF3 ground
analog ground for port 3
downstream data minus port 3
analog ground
downstream data plus port 3
power switch port 3, active LOW
output pad, push-pull open-drain, 8 mA output drive, 5 V tolerant
digital ground
data bit 0 input and output
bidirectional pad, push-pull input, three-state output, 4 mA output
drive, 3.3 V tolerant
data bit 1 input and output
bidirectional pad, push-pull input, three-state output, 4 mA output
drive, 3.3 V tolerant
data bit 2 input and output
bidirectional pad, push-pull input, three-state output, 4 mA output
drive, 3.3 V tolerant
digital supply; 1.65 V to 3.6 V; connect a 100 nF decoupling
capacitor; see
Section 7.7
data bit 3 input and output
bidirectional pad, push-pull input, three-state output, 4 mA output
drive, 3.3 V tolerant
data bit 4 input and output
bidirectional pad, push-pull input, three-state output, 4 mA output
drive, 3.3 V tolerant
data bit 5 input and output
bidirectional pad, push-pull input, three-state output, 4 mA output
drive, 3.3 V tolerant
digital ground
data bit 6 input and output
bidirectional pad, push-pull input, three-state output, 4 mA output
drive, 3.3 V tolerant
data bit 7 input and output
bidirectional pad, push-pull input, three-state output, 4 mA output
drive, 3.3 V tolerant
data bit 8 input and output
bidirectional pad, push-pull input, three-state output, 4 mA output
drive, 3.3 V tolerant
GND
RREF3
29
30
N2
N1
-
AI
GND
DM3
GND
DP3
PSW3_N
31
32
33
34
35
P2
P1
R2
R1
T1
-
AI/O
-
AI/O
OD
GND
DATA0
36
37
T2
R3
-
I/O
DATA1
38
T3
I/O
DATA2
39
R4
I/O
V
CC(I/O)
40
T4
P
DATA3
41
P5
I/O
DATA4
42
T5
I/O
DATA5
43
R5
I/O
GND
DATA6
44
45
T6
R6
-
I/O
DATA7
46
P7
I/O
DATA8
47
T7
I/O
Table 2:
Symbol
[1]
Pin description
…continued
Pin
LQFP128
Ball
TFBGA128
Type
[2]
Description
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