參數(shù)資料
型號： ISP1761
廠商： NXP Semiconductors N.V.
英文描述： Hi-Speed Universal Serial Bus On-The-Go controller
中文描述： 高速通用串行總線和On - The - Go控制器
文件頁數(shù)： 114/158頁
文件大?。?/td> 724K
代理商： ISP1761
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
114 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
The GDMA (slave) can operate in the counter mode. RD_N and WR_N are DMA data
strobe signals. These signals are also used as data strobe signals during the PIO access.
An internal multiplex will redirect these signals to the DMA Controller for the DMA transfer
or to registers for the PIO access.
In the counter mode, the DIS_XFER_CNT bit in the DcDMAConfiguration register must be
set to logic 0. The DMA Transfer Counter register must be programmed before any DMA
command is issued. The DMA transfer counter is set by writing from the LSByte to the
MSByte (address: 234h to 237h). The DMA transfer count is internally updated only after
the MSByte is written. Once the DMA transfer is started, the transfer counter starts
decrementing and on reaching 0, the DMA_XFER_OK bit is set and an interrupt is
generated by the ISP1761.
The DMA transfer starts once the DMA command is issued. Any of the following three
ways will terminate this DMA transfer:
Detecting an internal EOT (short packet on an OUT token)
Resetting the DMA
GDMA stop command.
There are two interrupts that are programmable to differentiate the method of DMA
termination: the INT_EOT and DMA_XFER_OK bits in the DMA Interrupt Reason register.
For details, see
Table 131
.
Remark:
The DMA bus defaults to three-state, until a DMA command is executed. All the
other control signals are not three-state.
10.6.1
DMA Command register (W: 0230h)
The DMA Command register is a 1 B register (for bit allocation, see
Table 120
) that
initiates all DMA transfer activities on the DMA controller. The register is write-only:
reading it will return FFh.
Remark:
The DMA bus will be in three-state until a DMA command is executed.
Table 119: Control bits for GDMA read or write (opcode = 00h/01h)
Control bits
Description
Mode register
DMACLKON
Set DMACLKON to logic 1
DcDMAConfiguration register
MODE[1:0]
Determines the active read or write data strobe signals
WIDTH
Selects the DMA bus width: 16 or 32 bits
DIS_XFER_CNT Disables the use of the DMA Transfer Counter
DMA Hardware register
ENDIAN[1:0]
Determines whether the data is to be byte swapped or normal
DACK_POL,
DREQ_POL
Reference
Table 97
Table 126
Table 128
Select the polarity of the DMA handshake signals
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相關(guān)代理商/技術(shù)參數(shù)
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ISP1761BE 功能描述:USB 接口集成電路 USB HS OTG CTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,518 功能描述:USB 接口集成電路 USB HS OTG CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,557 功能描述:USB 接口集成電路 USB HS OTG CTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE518 制造商:ST-Ericsson 功能描述:IC CONTROLLER USB OTG 128LQFP
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