參數(shù)資料
型號(hào): ISP1761
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus On-The-Go controller
中文描述: 高速通用串行總線和On - The - Go控制器
文件頁數(shù): 141/158頁
文件大?。?/td> 724K
代理商: ISP1761
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
141 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
15.2 Peripheral timing
15.2.1
PIO timing
15.2.1.1
PIO register read or write
Fig 27. ISP1761 register access timing: separate address and data buses (8051 style)
(write) DATA[31:0]
(read) DATA[31:0]
004aaa529
AD[17:1]
t
d58
t
su28
t
su38
t
d28
t
su18
T
cy18
t
h28
t
h18
t
d18
t
h38
WR_N
CS_N
RD_N
t
d38
t
w18
t
w28
t
d68
t
d48
Table 176: PIO register read or write
V
CC(I/O)
= 1.65 V to 1.95 V; T
amb
=
40
°
C to +85
°
C; unless otherwise specified.
Symbol
Parameter
Reading
t
w18
RD_N LOW pulse width
t
su18
address setup time before RD_N LOW
t
h18
address hold time after RD_N HIGH
t
d18
RD_N LOW to data valid delay
t
d28
RD_N HIGH to data outputs three-state delay
t
d38
RD_N HIGH to CS_N HIGH delay
t
d48
CS_N LOW to RD_N LOW delay
Writing
t
w28
WR_N LOW pulse width
t
su28
address setup time before WR_N LOW
t
h28
address hold time after WR_N HIGH
t
su38
data setup time before WR_N HIGH
t
h38
data hold time after WR_N HIGH
t
d58
WR_N HIGH to CS_N HIGH delay
Min
Max
Unit
t
d1
0
0
33
-
0
0
-
-
-
-
1
-
-
ns
ns
ns
ns
ns
ns
ns
15
0
0
5
2
1
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
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