參數(shù)資料
型號： ISP1761
廠商： NXP Semiconductors N.V.
英文描述： Hi-Speed Universal Serial Bus On-The-Go controller
中文描述： 高速通用串行總線和On - The - Go控制器
文件頁數(shù)： 106/158頁
文件大?。?/td> 724K
代理商： ISP1761
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
106 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
10.4.5
DcInterruptEnable register (R/W: 0214h)
This register enables or disables individual interrupt sources. The interrupt for each
endpoint can be individually controlled through the associated IEPnRX or IEPnTX bits,
here n represents the endpoint number. All interrupts can be globally disabled through
bit GLINTENA in the Mode register (see
Table 96
).
An interrupt is generated when the USB SIE receives or generates an ACK or NAK on the
USB bus. The interrupt generation depends on the Debug mode settings of bit fields
CDBGMOD[1:0], DDBGMODIN[1:0] and DDBGMODOUT[1:0].
All data IN transactions use the Transmit buffers (TX) that are handled by the
DDBGMODIN bits. All data OUT transactions go through the Receive buffers (RX) that are
handled by the DDBGMODOUT bits. Transactions on control endpoint 0—IN, OUT and
SETUP—are handled by the CDBGMOD bits.
Interrupts caused by events on the USB bus (SOF, Pseudo SOF, suspend, resume, bus
reset, setup and high-speed status) can also be individually controlled. A bus reset
disables all enabled interrupts except bit IEBRST (bus reset), which remains unchanged.
The DcInterruptEnable register consists of 4 B. The bit allocation is given in
Table 103
.
Table 102: Debug register: bit allocation
Bit
Symbol
15 to 1
-
0
DEBUG
Description
reserved
Always set this bit to logic 0 when the ISP1761 is in 16-bit bus access
mode, or set bit 16 of the Interrupt Configuration register to logic 0 when
the ISP1761 is in 32-bit bus access mode.
Table 103: DcInterruptEnable register: bit allocation
Bit
31
Symbol
Reset
0
Bus Reset
0
Access
R/W
Bit
23
Symbol
IEP6TX
Reset
0
Bus Reset
0
Access
R/W
Bit
15
Symbol
IEP2TX
30
29
28
27
26
25
24
reserved
[1]
IEP7TX
0
0
R/W
17
IEP3TX
0
0
R/W
9
reserved
[1]
IEP7RX
0
0
R/W
16
IEP3RX
0
0
R/W
8
IEP0SETUP
0
0
0
0
0
0
0
0
0
0
R/W
22
IEP6RX
0
0
R/W
14
IEP2RX
R/W
21
IEP5TX
0
0
R/W
13
IEP1TX
R/W
20
IEP5RX
0
0
R/W
12
IEP1RX
R/W
19
IEP4TX
0
0
R/W
11
IEP0TX
R/W
18
IEP4RX
0
0
R/W
10
IEP0RX
Reset
Bus Reset
Access
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
相關(guān)PDF資料
PDF描述
ISP1761BE Hi-Speed Universal Serial Bus On-The-Go controller
ISP1761ET Hi-Speed Universal Serial Bus On-The-Go controller
ISP2100A Telecommunication IC
ISP2100BN4 Microprocessor
ISP2300 Controller Miscellaneous - Datasheet Reference
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1761BE 功能描述:USB 接口集成電路 USB HS OTG CTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,518 功能描述:USB 接口集成電路 USB HS OTG CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,557 功能描述:USB 接口集成電路 USB HS OTG CTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE518 制造商:ST-Ericsson 功能描述:IC CONTROLLER USB OTG 128LQFP
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*