參數(shù)資料
型號: DSP1627
英文描述: TVS 400W 6.5V BIDIRECT SMA
中文描述: DSP1627數(shù)字信號處理器
文件頁數(shù): 51/154頁
文件大?。?/td> 2365K
代理商: DSP1627
Data Sheet
March 2000
DSP1627 Digital Signal Processor
Lucent Technologies Inc.
51
5 Software Architecture
(continued)
Table 33. sbit Register
Bit
Field
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DIREC[7:0]
VALUE[7:0]
Field
DIREC
Value
1xxxxxxx
x1xxxxxx
xx1xxxxx
xxx1xxxx
xxxx1xxx
xxxxx1xx
xxxxxx1x
xxxxxxx1
Rxxxxxxx
xRxxxxxx
xxRxxxxx
xxxRxxxx
xxxxRxxx
xxxxxRxx
xxxxxxRx
xxxxxxxR
Description
IOBIT7 is an output (input when 0).
IOBIT6 is an output (input when 0).
IOBIT5 is an output (input when 0).
IOBIT4 is an output (input when 0).
IOBIT3 is an output (input when 0).
IOBIT2 is an output (input when 0).
IOBIT1 is an output (input when 0).
IOBIT0 is an output (input when 0).
Reads the current value of IOBIT7.
Reads the current value of IOBIT6.
Reads the current value of IOBIT5.
Reads the current value of IOBIT4.
Reads the current value of IOBIT3.
Reads the current value of IOBIT2.
Reads the current value of IOBIT1.
Reads the current value of IOBIT0.
VALUE
Table 34. cbit Register
Bit
Field
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
MODE/MASK[7:4]
DIREC[n]
*
1 (Output)
1 (Output)
1 (Output)
1 (Output)
0 (Input)
0 (Input)
0 (Input)
0 (Input)
MODE/MASK[3:0]
DATA/PAT[7:4]
DATA/PAT[3:0]
*
0
n
7.
MODE/MASK[n]
0
0
1
1
0
0
1
1
DATA/PAT[n]
0
1
0
1
0
1
0
1
Action
Clear
Set
No Change
Toggle
No Test
No Test
Test for Zero
Test for One
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