
Data Sheet
March 2000
DSP1627 Digital Signal Processor
Lucent Technologies Inc.
49
5 Software Architecture
(continued)
Encoding: A 0 disables an interrupt; a 1 enables an interrupt.
Encoding: A 0 indicates no interrupt. A 1 indicates an interrupt has been recognized and is pending or being serviced.
If a 1 is written to bits 4, 5, or 8 of ins, the corresponding interrupt is cleared.
Table 28. Parallel Host Interface Control (phifc) Register
Bit
Field
15—7
RSVD
6
5
4
3
2
1
0
PSOBEF
PFLAGSEL
PFLAG
PBSELF
PSTRB
PSTROBE
PMODE
Field
PMODE
Value
0
1
0
1
0
1
0
1
Description
8-bit data transfers.
16-bit data transfers.
Intelprotocol: PIDS and PODS data strobes.
Motorola protocol: PRWN and PDS data strobes.
When PSTROBE = 1, PODS pin (PDS) active-low.
When PSTROBE = 1, PODS pin (PDS) active-high.
In either mode, PBSEL pin = 0
→
pdx0 low byte. See Table 7.
If PMODE = 0, PBSEL pin = 1
→
pdx0 low byte.
If PMODE = 1, PBSEL pin = 0
→
pdx0 high byte.
PIBF and POBE pins active-high.
PIBF and POBE pins active-low.
Normal.
PIBF flag ORed with POBE flag and output on PIBF pin; POBE pin un-
changed (output buffer empty).
Normal.
POBE flag as read through PSTAT register is active-low.
PSTROBE
PSTRB
PBSELF
PFLAG
0
1
0
1
PFLAGSEL
PSOBEF
0
1
Table 29. Interrupt Control (inc) Register
Bit
Field
15
14—11
RSVD
10
9
8
7—6
RSVD
5—4
INT[1:0]
3
2
1
0
JINT
*
*
JINT is a JTAG interrupt and is controlled by the HDS. It may be made unmaskable by the Lucent Technologies development system tools.
OBE2
IBF2
TIME
PIBF
POBE
OBE
IBF
Table 30. Interrupt Status (ins) Register
Bit
Field
15
JINT
14—11
RSVD
10
9
8
7—6
RSVD
5—4
INT[1:0]
3
2
1
0
OBE2
IBF2
TIME
PIBF
POBE
OBE
IBF