參數(shù)資料
型號: DSP1627
英文描述: TVS 400W 6.5V BIDIRECT SMA
中文描述: DSP1627數(shù)字信號處理器
文件頁數(shù): 124/154頁
文件大?。?/td> 2365K
代理商: DSP1627
Data Sheet
March 2000
DSP1627 Digital Signal Processor
124
Lucent Technologies Inc.
12 Timing Characteristics for 2.7 V Operation
(continued)
Note:
The device needs to be clocked for at least six CKI cycles during reset after powerup. Otherwise, high cur-
rents may flow.
12.3 Reset Synchronization
*
See Table 62 for input clock electrical requirements.
Note: CKO
1
and CKO
2
are two possible CKO states before reset. CKO is free-running.
Figure 61. Reset Synchronization Timing
Table 149. Timing Characteristics for Powerup Reset and Chip Reset
Abbreviated Reference
t10
t11
Parameter
Min
Max
100
100
Unit
ns
ns
RSTB Disable Time (low to 3-state)
RSTB Enable Time (high to valid)
Table 150. Timing Requirements for Reset Synchronization Timing
Abbreviated Reference
t126
Parameter
Min
3
Max
T/2 – 5
Unit
ns
Reset Setup (high to high)
5-4011 (F).a
CKI
*
V
IH
V
IL
t126
t5 + 2 x t6
RSTB
V
IH
V
IL
V
IH
V
IL
CKO
V
IH
V
IL
CKO
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