參數(shù)資料
型號(hào)： DSP1627
英文描述： TVS 400W 6.5V BIDIRECT SMA
中文描述： DSP1627數(shù)字信號(hào)處理器
文件頁數(shù)： 45/154頁
文件大小： 2365K
代理商： DSP1627
Data Sheet
March 2000
DSP1627 Digital Signal Processor
Lucent Technologies Inc.
45
5 Software Architecture
(continued)
5.2 Register Settings
Tables 22 through 38 describe the programmable registers of the DSP1627 device. Table 40 describes the register
settings after reset.
Note that the following abbreviations are used in the tables:
I
x = don't care
I
R = read only
I
W = read/write
The reserved (RSVD) bits in the tables should always be written with zeros to make the program compatible with
future chip versions.
Table 22. Serial I/O Control Registers
*
See tdms register, SYNC field.
See tdms register, SYNC field.
The bit definitions of the sioc2 register are identical to the sioc register bit definitions.
sioc
Bit
Field
10
9
8
7
6
5
4
3
2
1
0
DODLY
LD
CLK
MSB
OLD
ILD
OCK
ICK
OLEN
ILEN
Field
DODLY
Value
0
1
Description
DO changes on the rising edge of OCK.
DO changes on the falling edge of OCK. This delay in driving DO increases the hold
time on DO by half a cycle of OCK.
In active mode, ILD1 and/or OLD1 = ICK1/16, active SYNC1 = ICK1/[128/256*].
In active mode, ILD1 and/or OLD1 = OCK1/16, active SYNC1 = OCK1/[128/256*].
Active clock = CKI/2 (1X).
Active clock = CKI/6 (1X).
Active clock = CKI/8 (1X).
Active clock = CKI/10 (1X).
LSB first.
MSB first.
OLD1 is an input (passive mode).
OLD1 is an output (active mode).
ILD1 is an input (passive mode).
ILD1 is an output (active mode).
OCK1 is an input (passive mode).
OCK1 is an output (active mode).
ICK1 is an input (passive mode).
ICK1 is an output (active mode).
16-bit output.
8-bit output.
16-bit input.
8-bit input.
LD
0
1
00
01
10
11
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CLK
MSB
OLD
ILD
OCK
ICK
OLEN
ILEN
sioc2
Bit
Field
10
9
8
7
6
5
4
3
2
1
0
DODLY2
LD2
CLK2
MSB2
OLD2
ILD2
OCK2
ICK2
OLEN2
ILEN2
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