參數(shù)資料
型號: DSP1627
英文描述: TVS 400W 6.5V BIDIRECT SMA
中文描述: DSP1627數(shù)字信號處理器
文件頁數(shù): 126/154頁
文件大?。?/td> 2365K
代理商: DSP1627
Data Sheet
March 2000
DSP1627 Digital Signal Processor
126
Lucent Technologies Inc.
12 Timing Characteristics for 2.7 V Operation
(continued)
12.5 Interrupt
*
IACK assertion is guaranteed to be enclosed by VEC[3:0] assertion.
CKO is free-running.
Figure 63. Interrupt Timing Diagram
Note: Interrupt is asserted during an interruptible instruction and no other pending interrupts.
Note: Interrupt is asserted during an interruptible instruction and no other pending interrupts.
Table 153. Timing Requirements for Interrupt
Abbreviated Reference
t21
t22
Parameter
Min
19
2T
Max
Unit
ns
ns
Interrupt Setup (high to low)
INT Assertion Time (high to low)
Table 154. Timing Characteristics for Interrupt
Abbreviated Reference
t23
t24
t25
t26
Parameter
Min
Max
T/2 + 10
12.5
10
12.5
Unit
ns
ns
ns
ns
IACK Assertion Time (low to high)
VEC Assertion Time (low to high)
IACK Invalid Time (low to low)
VEC Invalid Time (low to low)
5-4018 (F)
CKO
*
INT[1:0]
t21
V
OH
V
OL
V
IH
V
IL
t22
IACK
V
OH
V
OL
VEC[3:0]
V
OH
V
OL
t23
t24
t25
t26
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