參數(shù)資料
型號(hào): 82559
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: Fast Ethernet Multifunction PCI/CARD bus controller(快速以太網(wǎng)多功能PCI/CARD 總線控制器)
中文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PBGA196
封裝: 15 X 15 MM, BGA-196
文件頁(yè)數(shù): 57/124頁(yè)
文件大?。?/td> 1332K
代理商: 82559
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Networking Silicon — 82559
Datasheet
47
will perform Auto-Negotiation or Parallel Detection with no data packets being transmitted.
Connection is then established either by FLP exchange or Parallel Detection. The PHY unit will
look for both FLPs and link integrity pulses. The following diagram illustrates this process.
5.4
LED Description
The PHY unit supports three LED pins to indicate link status, network activity and network speed.
Each pin can source 10 mA.
Link
: This LED is off until a valid link has been detected. After a valid link has been detected,
the LED will remain on (active-low).
Activity
: This LED blinks on and off when activity is detected on the wire.
Speed
: This LED will be on if a 100BASE-TX link is detected and off if a 10BASE-T link is
detected. If the link fails while in Auto-Negotiation, this LED will keep the last valid link state.
If 100BASE-TX link is forced this LED will be on, regardless of the link status. This LED will
be of if the 10BASE-T link is forced, regardless of the link status.
MDI register 27 in
Section 10.3.12, “Register 27: PHY Unit Special Control Bit Definitions” on
page 92
details the information for LED function mapping and support enhancements.
Figure 15. Auto-Negotiation and Parallel Detect
Force_Fail
Ability detect either by
parallel detect or auto-
negotiation.
10Base-T or
100Base-TX Link
Ready
FLP capable
LINK PASS
Parallel Detection
Auto-Negotiation
Look at Link Pulse;
Auto-Negotiation capable = 0
Auto-Negotiation capable = 1
Ability Match
Auto-Negotiation Complete bit set
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