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參數(shù)資料
| 型號： | 82559 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Fast Ethernet Multifunction PCI/CARD bus controller(快速以太網(wǎng)多功能PCI/CARD 總線控制器) |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PBGA196 |
| 封裝： | 15 X 15 MM, BGA-196 |
| 文件頁數(shù)： | 56/124頁 |
| 文件大?。?/td> | 1332K |
| 代理商： | 82559 |
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82559 — Networking Silicon
46
Datasheet
5.2.7
10BASE-T Full Duplex
The PHY unit supports 10 Mbps full duplex by disabling the collision function, the squelch test,
and the carrier sense transmit function. This allows the PHY unit to transmit and receive
simultaneously, achieving up to 20 Mbps of network bandwidth. The configuration can be achieved
through Auto-Negotiation. Full duplex should only be used in point-to-point connections (no
shared media).
5.3
Auto-Negotiation Functionality
The PHY unit supports Auto-Negotiation. Auto-Negotiation is an automatic configuration scheme
designed to manage interoperability in multifunctional LAN environments. It allows two stations
with “N” different modes of communication to establish a common mode of operation. At power-
up, Auto-Negotiation automatically establishes a link that takes advantage of an Auto-Negotiation
capable device. An Auto-Negotiation capable device can detect and automatically configure its
port to take maximum advantage of common modes of operation without user intervention or prior
knowledge by either station. The possible common modes of operation are: 100BASE-TX,
100BASE-TX Full Duplex, 10BASE-T, and 10BASE-T Full Duplex.
5.3.1
Description
Auto-Negotiation selects the fastest operating mode (in other words, the highest common
denominator) available to hardware at both ends of the cable. A PHY’s capability is encoded by
bursts of link pulses called Fast Link Pulses (FLPs). Connection is established by FLP exchange
and handshake during link initialization time. Once the link is established by this handshake, the
native link pulse scheme resumes (that is, 10BASE-T or 100BASE-TX link pulses). A reset or
management renegotiate command (through the MDI interface) will restart the process. To enable
Auto-Negotiation, bit 12 of the MDI Control Register must be set. If the PHY unit cannot perform
Auto-Negotiation, it will set this bit to a 0 and determine the speed using Parallel Detection.
The PHY unit supports four technologies: 100BASE-Tx Full and Half Duplex and 10BASE-T Full
and Half Duplex. Since only one technology can be used at a time (after every re-negotiate
command), a prioritization scheme must be used to ensure that the highest common denominator
ability is chosen. Each bit in this table is set according to what the PHY is capable of supporting. In
the case of the 82559’s PHY unit, bits 0, 1, 2, 3, and 5 (10BASE-T, 10BASE-T full duplex,
100BASE-TX, 100BASE-TX full duplex and pause [frame based flow control], respectively) are
set.
To detect the correct technology, the two register fields, technology ability and technology priority,
should be ANDed together to obtain the highest common denominator. This value should then be
used to map into a priority resolution table used by the MAC driver to use the appropriate
technology.
5.3.2
Parallel Detect and Auto-Negotiation
The PHY unit automatically determines the speed of the link either by using Parallel Detect or
Auto-Negotiation. Upon a reset, a link status fail, or a Negotiate/Re-negotiate command, the PHY
unit inserts a long delay during which no link pulses are transmitted. This period, known as
Force_Fail, insures that the PHY unit‘s link partner has gone into a Link Fail state before Auto-
Negotiation or Parallel Detection begins. Thus, both sides (PHY unit and PHY unit’s link partner)
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