參數(shù)資料
型號: 82559
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: Fast Ethernet Multifunction PCI/CARD bus controller(快速以太網(wǎng)多功能PCI/CARD 總線控制器)
中文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PBGA196
封裝: 15 X 15 MM, BGA-196
文件頁數(shù): 112/124頁
文件大?。?/td> 1332K
代理商: 82559
82559 — Networking Silicon
102
Datasheet
12.4
Timing Specifications
12.4.1
Clocks Specifications
12.4.1.1
PCI/CardBus Clock Specifications
The 82559 uses the PCI Clock signal directly.
Figure 31
shows the clock waveform and required
measurement points for the PCI Clock signal.
Table 37
summarizes the PCI Clock specifications.
NOTES:
1. The 82559 will work with any PCI clock frequency up to 33 MHz.
2. Rise and fall times are specified in terms of the edge rate measured in V/ns. This slew rate is met across the
minimum peak-to-peak portion of the clock waveform as shown in
Figure 31
.
12.4.1.2
X1 Specifications
X1 serves as a signal input from an external crystal or oscillator.
Table 38
defines the 82559
requirements from this signal.
Figure 31. PCI/CardBus Clock Waveform
0.6V
CC
0.475V
CC
0.4V
CC
0.325V
CC
0.2V
CC
0.4V
p-to-p
(minimum)
T_high
T_low
T_cyc
Table 37. PCI/CardBus Clock Specifications
Symbol
Parameter
Min
Max
Units
Notes
T1
T
cyc
CLK Cycle Time
30
ns
1
T2
T
high
CLK High Time
11
ns
T3
T
low
CLK Low Time
11
ns
T4
T
slew
CLK Slew Rate
1
4
V/ns
2
Table 38. X1 Clock Specifications
Symbol
Parameter
Min
Typical
Max
Units
Notes
T8
Tx1_dc
X1 Duty Cycle
40%
60%
T9
Tx1_pr
X1 Period
40
ns
±50PPM
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