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參數(shù)資料
| 型號： | 82559 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Fast Ethernet Multifunction PCI/CARD bus controller(快速以太網(wǎng)多功能PCI/CARD 總線控制器) |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PBGA196 |
| 封裝： | 15 X 15 MM, BGA-196 |
| 文件頁數(shù)： | 38/124頁 |
| 文件大?。?/td> | 1332K |
| 代理商： | 82559 |
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82559 — Networking Silicon
28
Datasheet
capabilities if it is connected to an auxiliary power source in the system. If PME is disabled, the
82559 does not provide wake-up capability or maintain link integrity. In this mode the 82559
consumes its minimal power.
The 82559 enables a system to be in a sub-5 watt state (low power state) and still be virtually
connected. More specifically, the 82559 supports full wake-up capabilities while it is in the D3
cold
state. The 82559 can be connected to an auxiliary power source (V
AUX
), which enables it to provide
wake-up functionality while the PCI power is off. The typical current consumption of the 82559 is
125 mA at 3.3 V. Thus, a dual power plane is not required. If connected to an auxiliary power
source, the 82559 receives all of its power from the auxiliary source in all power states. When
connected to an auxiliary power supply, the 82559 is required to have a status indicator of whether
or not the power supply is valid (in other words, auxiliary power is stable). The indication is
received at the AUXPWR pin, as described next.
4.3.1.4.1
Auxiliary Power Signal
The 82559 senses whether it is connected to the PCI power supply or to an auxiliary power supply
(V
AUX
) via the FLA1/AUXPWR pin. The auxiliary power detection pin (multiplexed with FLA1)
is sampled when the PCI RST# or ALTRST# signals are active. An external pull-up resistor should
be connected to the 82559 if it is fed by V
AUX
; otherwise, the FLA1/AUXPWR pin should be left
floating. The presence of AUXPWR affects the value reported in the Power Management
Capability Register (PCI Configuration Space, offset DEH). The Power Management Capability
Register is described in more detail in
Section 8.1.20, “Power Management Capabilities Register”
on page 63
.
4.3.1.4.2
Alternate Reset Signal
The 82559’s ALTRST# input pin functions as a power-on reset input. Following ALTRST# being
driven low, the 82559 is initialized to a known state. In systems that support auxiliary power, this
pin should be connected to the auxiliary power’s power stable signal (power good) of the 82559’s
power source. In a LAN on Motherboard (LOM) solution, this signal is available on the system. In
network adapter implementations, an external analog device connected to the auxiliary power
supply can be used to produce this signal. In systems that do not have an auxiliary power source,
the ALTRST# signal should be tied to a pull-up resistor.
4.3.1.4.3
Isolate Signal
When the 82559 is connected to V
AUX
, it may be powered on while the PCI bus is powered off. In
this case, the 82559 isolates itself from the PCI bus. The 82559 has a dedicated ISOLATE# pin that
should be connected to the PCI power source’s stable power signal (power good). Whenever the
PCI Bus is in the B3 state, the PCI power good signal becomes inactive and the 82559 isolates itself
from the PCI bus. During this state, the 82559 ignores all PCI signals including the RST# and CLK
signals. It also tristates all PCI outputs, except the PME# signal. In the transition to an active PCI
power state (in other words, from B3 power state to B0 power state), the PCI power good signal
shifts high.
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