
48
Software Environment
Chapter 3
AMD-K6-2E+ Embedded Processor Data Sheet
23542A/0—September 2000
Preliminary Information
SYSCALL/SYSRET
Target Address
Register (STAR)
The SYSCALL/SYSRET target address register (STAR)
contains the target EIP address used by the SYSCALL
instruction and the 16-bit code and stack segment selector
bases used by the SYSCALL and SYSRET instructions. Figure
35 shows the format of the STAR register, and Table 7 defines
the function of each bit of the STAR register. For more
information, see the
SYSCALL and SYSRET Instruction
Specification Application Note
, order# 21086. The STAR register
is MSR C000_0081h.
Figure 35. SYSCALL/SYSRET Target Address Register (STAR)
Write Handling
Control Register
(WHCR)
The Write Handling Control Register (WHCR) is a MSR that
contains two fields—the Write Allocate Enable Limit
(WAELIM) field, and the Write Allocate Enable 15-to-16-Mbyte
(WAE15M) bit (see Figure 36). For more information, see
“Write Allocate” on page 215. The WHCR register is MSR
C000_0082h.
Figure 36. Write Handling Control Register (WHCR)
31
0
63
Target EIP Address
32
47
48
SYSCALL CS Selector and SS
Selector Base
SYSRET CS Selector and SS
Selector Base
Table 7.
SYSCALL/SYSRET Target Address Register (STAR) Definition
Bit
63–48
47–32
31–0
Description
SYSRET CS and SS Selector Base
SYSCALL CS and SS Selector Base
Target EIP Address
R/W
R/W
R/W
R/W
15
22
0
63
Reserved
WAELIM
16
W
A
E
1
5
M
Note
:
Hardware RESET initializes this MSR to all zeros.
Symbol
WAELIM
WAE15M
Description
Write Allocate Enable Limit
Write Allocate Enable 15-to-16-Mbyte 16
Bits
31-22
17
21
31
32