
238
Floating-Point and Multimedia Execution Units
Chapter 11
AMD-K6-2E+ Embedded Processor Data Sheet
23542A/0—September 2000
Preliminary Information
External Logic
Support of
Floating-Point
Exceptions
The processor provides the FERR# (Floating-Point Error) and
IGNNE# (Ignore Numeric Error) signals to allow the external
logic to generate the interrupt in a manner consistent with
IBM-compatible PC/AT systems. The assertion of FERR#
indicates the occurrence of an unmasked floating-point
exception resulting from the execution of a floating-point
instruction. IGNNE# is used by the external hardware to control
the effect of an unmasked floating-point exception. Under
certain circumstances, if IGNNE# is sampled asserted, the
processor ignores the floating-point exception.
Figure 88 on page 239 illustrates an implementation of external
logic for supporting floating-point exceptions. The following
example explains the operation of the external logic in Figure
88:
1. As the result of a floating-point exception, the processor
asserts FERR#.
2. The assertion of FERR# and the sampling of IGNNE#
negated indicates the processor has stopped instruction
execution and is waiting for an interrupt.
3. The assertion of FERR# leads to the assertion of INTR by
the interrupt controller.
4. The processor acknowledges the interrupt and jumps to the
corresponding interrupt service routine in which an I/O
write cycle to address port F0h leads to the assertion of
IGNNE#.
5. When IGNNE# is sampled asserted, the processor ignores
the floating-point exception and continues instruction
execution.
6. When the processor negates FERR#, the external logic
negates IGNNE#.
See “FERR# (Floating-Point Error)” on page 111 and “IGNNE#
(Ignore Numeric Exception)” on page 116 for more details.