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XRT79L71
PRELIMINARY
153
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
Insure that either one of the following conditions are true.
a.
That the Receive DS3/E3 LIU Block is receive a proper DS3 line signal from the remote terminal
equipment, or
b. That the SFM Synthesizer block (within the Receive DS3/E3 LIU Block) is configured to generate a
44.736MHz clock (to the remainder of the Receive DS3/E3 LIU Block circuitry) from either an
externally supplied 12.288MHz or a 44.736MHz clock signal. (Please see
Section 4.3.1.5 for
details on how to accomplish this)
Tie the TxFrameRef input pin (Ball A11) to GND.
NOTES:
1.
In order to permit the Microprocessor Interface to function (for Revision A silicon) the user is still required to supply
a sufficiently high frequency clock signal to the "TxInClk" input pin, even if the XRT79L71 is configured to operate
in the "Loop-Timing" Mode.
2.
Configuring the XRT79L71 to operate in the "Loop-Timing" Mode is synonymous with configuring the Transmit
Payload Data Input Interface block into "Mode 1" (for Serial-Mode Applications - see
SSection 4.2.1.1) or into
4.2.6
TRANSMIT DS3/E3 LIU BLOCK - DS3 APPLICATIONS
The Transmit DS3/E3 LIU Block is the sixth and last functional block within the Transmit Direction of the
XRT79L71 that we will discuss for Clear-Channel Framer Applications. Figure 67 presents an illustration of
the Transmit Direction circuitry whenever the XRT79L71 has been configured to operate in the DS3 Clear-
Channel Framer Mode, with the Transmit DS3/E3 LIU block highlighted.
FIGURE 67. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY, WHEN-
EVER THE
XRT79L71 HAS BEEN CONFIGURED TO OPERATE IN THE DS3 CLEAR-CHANNEL FRAMER MODE (WITH THE
TRANSMIT DS3/E3 LIU BLOCK HIGHLIGHTED)
Transmit
Payload Data
Input
Interface
Block
Transmit
Payload Data
Input
Interface
Block
Transmit
DS3/E3
Framer
Block
Transmit
DS3/E3
Framer
Block
Tranmit
DS3/E3
LIU Block
Tranmit
DS3/E3
LIU Block
TxSer
TxNib[3:0]
TxInClk
TRING
TTIP
Transmit
Overhead Data
Input Interface
Block
Transmit
Overhead Data
Input Interface
Block
TxOHClk
TxOHIns
TxOHInd
TxOH
TxOHEnable
TxOHFrame
TxNibClk
TxFrame
Tx LAPD
Controller
Block
Tx LAPD
Controller
Block
From Microprocessor
Interface Block
Tx LAPD
Buffer
(90 Bytes)
Tx LAPD
Buffer
(90 Bytes)
Tx FEAC
Processor
Block
Tx FEAC
Processor
Block