PRELIMINARY
XRT79L71
390
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
NOTES:
1.
If the Transmit DS3/E3 Framer block has been configured to compute and insert the BIP-4 nibble into each
outbound E3 frame, then the "Near-End" Transmit DS3/E3 Framer block (within this particular XRT79L71) will
automatically be configured to set the "A" bit-field (within its very next outbound E3 frame) to "1" for each time in
which the Receive E3 Framer block receives an E3 frame with an erred BIP-4 Nibble.
Please see
PAGE 324.for more information on this transmission of the FEBE/REI indicator.
2.
For instructions on how to read out these "Performance Monitor" Registers, please see
Section 2.5.
5.3.2.7
DETECTING FEBE/REI (FAR-END BLOCK ERROR/REMOTE ERROR INDICATOR) EVENTS
If the Receive E3 Framer block has been configured accordingly, it has the responsibility for detecting and
flagging the occurrence of FEBE/REI events.
To configure the Receive E3 Framer block to detect and flag FEBE/REI events, within the incoming E3 data-
stream, then user must set Bit 0 (RxBIP-4 Enable) within the "Receive E3 Configuration and Status Register #
1" to "1" as depicted below.
Assuming that the user implements the "above-mentioned" procedure, then the Receive E3 Framer block has
the responsibility for detecting and flagging the occurrence of FEBE/REI events, as described below.
If the source and sink terminals are configured to support BIP-4 nibble verification, then the "A" bit will function
as the "FEBE/REI" bit-field.
The remote terminal equipment (which is generating the incoming E3 data-
stream) will set the "A" bit-field to the appropriate value that indicates whether or not it (the remote terminal) is
experiencing any BIP-4 nibble errors. If the remote terminal equipment is currently not detecting any BIP-4
Nibble errors, then it will set the "A" bit-field (within each outbound E3 frame) to "0". Hence, the FEBE/REI
value (e.g., the "A" bit value) for an un-erred condition is "0".
Conversely, if the remote terminal equipment is detecting BIP-4 nibble errors, then it will proceed to set the "A"
bit-field (within the very next outbound E3 frame) to "1".
If "BIP-4 Verification" has been enabled, and if the Receive E3 Framer block receives any E3 frames, in which
the "A" bit is set to "1", then it will increment the "PMON FEBE/REI Event Count Registers" once for each E3
frame that it receives, in which the "A" bit set to "1". The bit-format and address locations these registers are
presented below.
One Second - Parity Error Accumulator Register - LSB (Address = 0x1171)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
One_Second_Parity_Error_Accum_LSB[7:0]
R/O
0
Receive E3 Configuration and Status Register # 1 - G.751 (Address = 0x1110)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
RxFERF
Algo
Unused
RxBIP-4
Enable
R/O
R/W
R/O
R/W
0
X
0
1