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參數(shù)資料
| 型號： | XRT83D10IW |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 1/18頁 |
| 文件大小： | 0K |
| 描述： | IC LIU T1/E1 SGL 28SOJ |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | T1，E1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-BSOJ |
| 供應(yīng)商設(shè)備封裝： | 28-SOJ |
| 包裝： | 管件 |
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
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XRT83D10
SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT
JULY 2004
REV. 1.0.3
GENERAL DESCRIPTION
The XRT83D10 is a fully integrated, single channel,
Line Interface Unit (Transceiver) for 75
or 120 E1
(2.048
Mbps)
and
100
DS1 (1.544 Mbps)
applications.
The LIU consists of a receiver with
adaptive data slicer for accurate data and clock
recovery and a transmitter which accepts dual-rail
digital inputs for signal transmission to the line using
a low- impedance differential line driver. The LIU also
includes a crystal-less jitter attenuator for clock and
data
smoothing
which,
depending
on
system
requirements, can be selected in either the transmit
or receive path.
The XRT83D10 uses the transformer coupling on
both the Receiver and Transmitter sides, and
supports both 120
balanced,75 unbalanced and
100
interfaces.
FEATURES
Complete E1 (CEPT) and DS1 Line Interface Unit
Generates transmit output pulses that are compli-
ant with the ITU-T G.703 Pulse Template for
2.048Mbps (E1) rates
On-Chip Pulse Shaping for both 75
,120 and
100
Line Drivers
Clock Recovery and Selectable Crystal-less Jitter
attenuator
Compliant with ETS300166 Return Loss
Compliant with the ITU-T G.823 Jitter Tolerance
Requirements
Remote, Local and Digital Loop backs
Declares and Clears LOS per ITU-T G.775
-40°C to 85°C Temperature Range
Low Power Dissipation
+5V or +3.3V Supply Operation
Pin Compatible with AGERE T7290A and T5290A
APPLICATIONS
PDH Multiplexers
SDH Multiplexers
Digital Cross-Connect Systems
DECT (Digital European Cordless Telephone) Base
Stations
CSU/DSU Equipment
FIGURE 1. BLOCK DIAGRAM OF THE XRT83D10
EXC LK
TAO S
EC 1
EC 2
EC 3
MOD E1
MOD E2
LO O PA
LO O PB
CS
V
DDA, G N D A
V
DDD, G N D D
Peak
Detector
Data
Slicer
D ata &
Tim ing
Recovery
Tim ing
Generator
DLOS
Jitter
Attenuator
Digital
Loopback
LP 3
Local
Loopback
LP1
Transm it
Monitor
Loss of
Clock
Pulse
Equalizer
Rem ote
Looback
LP2
TA O S
Tx Line
Driver
MO DE 2
TA O S
+
CLKLO S
2
EXCLK
JA
Clock
TS C
2
EXCLK
Local
Rem ote
Digital
TAO S
EC 1
EC 2
EC 3
MOD E1
MOD E2
4
Decode
RLOS
EXCLK
RPDATA
RN DATA
RCLK
FO FS
TPD ATA
TNDATA
TC LK
Transm it
Data
Receive
Data
ALO S
SCLK
DLO S
ICT
P
Interface
MO DE 1
MO DE 2
RTIP
RRING
TTIP
TRING
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| XRT83D10IW-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Single Ch; 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83D10IWTR | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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| XRT83L30 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L30_06 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
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