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XRT79L71
PRELIMINARY
491
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
Steps to configure the Transmit Trail-Trace Message Controller block to transmit a given Trail-Trace
Message
To transmit a given Trail-Trace Message via the E3 data-stream, execute the following steps.
STEP 1 - Make sure that the XRT79L71 has been configured to operate in the E3, ITU-T G.832 Framing
format.
The user can accomplish this by setting Bit 6 (IsDS3) to "0" and by setting Bit 2 (Frame Format) to "1" as
depicted below.
STEP 2 - Write in the appropriate value into the Transmit Trail-Trace Message Register - Byte 1, as
depicted below.
The contents within the Transmit Trail-Trace Message Register - Byte 1 will typically be of the form [1, C6, C5,
C4, C3, C2, C1, C0]. The "1" within the MSB (most significant bit) position of this byte is used to designate that
this octet is the Frame-Start Marker byte (e.g., the very first of the 16 TR bytes, within a Trail-Trace Message
Super-Frame) within the outbound Trail-Trace Message. The remaining seven bits (e.g., C6 through C0) is
typically the result of a CRC-7 calculation that was computed over the previous Trail-Trace Message that was
transmitted to the remote terminal equipment.
NOTES:
1.
It is imperative that as the user writes in a value into the Transmit E3 Trail-Trace Message Byte 1 Register that the
user set the MSB (most significant bit) within this register to "1" as depicted above.
2.
The circuitry within the XRT79L71 will NOT compute this CRC-7 value. To support this CRC-7 feature, the user
will need to externally compute the CRC-7 value over a given outbound Trail-Trace Message and will need to write
this value into Bits 6 through 0 within the Transmit Trail-Trace Message Register - Byte 1, as depicted above.
STEP 3 - Write in the value of the remaining 15 ASCII characters within the outbound Trail-Trace
Message into the Transmit Trail-Trace Message Register - Bytes 2 through 16, as depicted below.
Framer Operating Mode Register (Address = 0x1100)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Local Loop
Back
IsDS3
Internal LOS
Enable
RESET
Direct
Mapped
ATM
Frame For-
mat
TimRefSel[1:0]
R/W
0
1
0
1
Transmit E3 Trail-Trace Message Byte 1 Register - G.832 (Address = 0x1138)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
TxTTB_Byte_1
R/W
1
C6
C5
C4
C3
C2
C1
C0
Transmit E3 Trail-Trace Message Byte 2 Register - G.832 (Address = 0x1139)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
TxTTB_Byte_2
R/W
0
A6
A5
A4
A3
A2
A1
A0