參數(shù)資料
型號: uPSD3233
廠商: 意法半導(dǎo)體
英文描述: Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
中文描述: 閃存可編程系統(tǒng)器件與8032微控制器內(nèi)核(嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器)
文件頁數(shù): 84/164頁
文件大?。?/td> 1133K
代理商: UPSD3233
μ
PSD3200 FAMILY
84/164
DRAFT(Thursday 20 June 2002, 13:15).
Table 69. USBEndpoint1 (and 2) Transmit Control Register (UCON1: 0EBh)
Table 70. Description of the UCON1 Bits
7
6
5
4
3
2
1
0
TSEQ1
EP12SEL
TX1E
FRESUM
TP1SIZ3
TP1SIZ2
TP1SIZ1
TP1SIZ0
Bit
Symbol
R/W
Function
7
TSEQ1
R/W
Endpoint 1 / Endpoint 2 transmit data packet PID. (0=DATA0 , 1=DATA1)
This bit determines which type of data packet (DATA0 or DATA1) will be
sent during the next IN transaction directed to Endpoint 1 or Endpoint 2.
Toggling of this bit must be controlled by software. Reset clears this bit.
6
EP12SEL
R/W
Endpoint 1 / Endpoint 2 transmit selection. (0=Endpoint 1, 1=Endpoint 2)
This bit specifies whether the data inside the registers UDT1 are used for
Endpoint 1 or Endpoint 2. If all the conditions fora successful Endpoint 2
USB response to a hosts IN token are satisfied (TXD1F=0, TX1E=1,
STALL2=0, and EP2E=1) except that the EP12SEL bit is configured for
Endpoint 1, the USB responds with a NAK handshake packet. Reset
clears this bit.
5
TX1E
R/W
Endpoint1 / Endpoint2 transmit enable.
This bit enables a transmit to occur when the USB Host Controller send
an IN token to Endpoint 1 or Endpoint 2. The appropriate endpoint
enable bit, EP1E or EP2E bit in the UCON2 register, should also be set.
Software should set the TX1E bit when data is ready to be transmitted. It
must be cleared by software when nomore data needs to be transmitted.
If this bit is 0 or TXD1F is set, the USB will respond with a NAK
handshake to any Endpoint 1 or Endpoint 2 directed IN token.
Reset clears this bit.
4
FRESUM
R/W
Force resume.
This bit forces a resume state (“K” on non-idle state) on the USB data
lines to initiate a remote wake-up. Software should control the timing of
the forced resume to be between 10ms and 15ms. Setting this bit will not
cause the RESUMF bit to set.
3 to 0
TP1SIZ3 to
TP1SIZ0
R/W
The number of transmit data bytes. These bits are cleared by reset.
相關(guān)PDF資料
PDF描述
uPSD3234(中文) Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
uPSD3212C(中文) Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM(帶8032微控制器內(nèi)核和16Kbit SRAM的FLASH可編程系統(tǒng)器件)
uPSD3254A(中文) Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內(nèi)核的FLASH可編程系統(tǒng)器件)
uPSD3254BV(中文) Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內(nèi)核的FLASH可編程系統(tǒng)器件)
UPSD3234A Flash Programmable System Devices with 8032 Microcontroller Core
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPSD3233A-24T1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3233A-24T1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core
UPSD3233A-24T6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3233A-24T6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core
UPSD3233A-24U1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core