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參數(shù)資料
| 型號： | uPSD3233 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器) |
| 中文描述： | 閃存可編程系統(tǒng)器件與8032微控制器內(nèi)核（嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器） |
| 文件頁數(shù)： | 23/164頁 |
| 文件大小： | 1133K |
| 代理商： | UPSD3233 |
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μ
PSD3200 FAMILY
DRAFT(Thursday 20 June 2002, 13:15).
In all cases the programmer specifies the destina-
tion address to the assembler in thesame way: as
a label or as a 16-bit constant. The assembler will
put the destination address into the correct format
for the given instruction. If the format required by
the instruction will not support the distance to the
specified destination address, a “Destination out
of range” message is written into the List file.
The JMP @A+DPTR instruction supports case
jumps. The destination address is computed atex-
ecution time as the sum of the 16-bit DPTR regis-
ter and the Accumulator. Typically. DPTR is set up
with the address of a jump table. In a 5-way
branch, for ex-ample, an integer 0 through 4 is
loaded into the Accumulator. The code to be exe-
cuted might be as follows:
MOV DPTR,#JUMP TABLE
MOV A,INDEX_NUMBER
RL A
JMP @A+DPTR
The RL Ainstruction convertsthe index number (0
through 4) to an even number on the range 0
through 8, because each entry inthe jump table is
2 bytes long:
JUMP TABLE:
AJMP CASE 0
AJMP CASE 1
AJMP CASE 2
AJMP CASE 3
AJMP CASE 4
Table 13 shows a single “CALL addr” instruction,
but there are two of them, LCALL and ACALL,
which differ in the format in which the subroutine
address is given to the CPU. CALL is a generic
mnemonic which can be used if the programmer
does not care which way the address is encoded.
The LCALL instruction uses the16-bit address for-
mat, and the subroutine can be anywhere in the
64K Program Memory space. The ACALL instruc-
tion uses the 11-bit format, and the subroutine
must be inthe same 2K block as the instructionfol-
lowing the ACALL.
In any case, the programmer specifies the subrou-
tine address to the assembler in thesame way: as
a label or as a 16-bit constant. The assembler will
put the address into the correct format for the giv-
en instructions.
Subroutines should end with a RET instruction,
which returns execution to the instruction following
the CALL.
RETI is used to return from an interrupt service
routine. The only difference between RET and
RETI is that RETI tellsthe interrupt control system
that the interrupt in progress is done. If there is no
interrupt in progress at the time RETI is executed,
then the RETI is functionally identical to RET.
Table 14. Conditional Jump Instructions
Table 14 shows the list of conditional jumps avail-
able to the
μ
PSD3200 Family user. All of these
jumps specify the destination address by the rela-
tive offset method, and so are limited to a jump dis-
tance of -128 to +127 bytes from the instruction
following the conditional jump instruction. Impor-
tant to note, however, the user specifies to the as-
sembler the actual destination address the same
way as the other jumps: as a label or a 16-bit con-
stant.
There is no Zero bit in the PSW. The JZ and JNZ
instructions test the Accumulator data for that con-
dition.
The DJNZ instruction(Decrement and Jump if Not
Zero) is for loop control. To execute a loop N
times, load a counter bytewith N and terminate the
loop with a DJNZ to the beginning of the loop, as
shown below for N = 10:
MOV COUNTER,#10
LOOP: (begin loop)
(end loop)
DJNZ COUNTER, LOOP
Mnemonic
Operation
Addressing Modes
Dir.
Ind.
Reg.
Imm
JZ rel
Jump if A = 0
Accumulator only
JNZ rel
Jump if A
≠
0
Accumulator only
DJNZ <byte>,rel
Decrement and jump if not zero
X
X
CJNE A,<byte>,rel
Jump if A
≠
<byte>
X
X
CJNE <byte>,#data,rel
Jump if <byte>
≠
#data
X
X
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PDF描述 |
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| uPSD3234(中文) | Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器) |
| uPSD3212C(中文) | Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM(帶8032微控制器內(nèi)核和16Kbit SRAM的FLASH可編程系統(tǒng)器件) |
| uPSD3254A(中文) | Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內(nèi)核的FLASH可編程系統(tǒng)器件) |
| uPSD3254BV(中文) | Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內(nèi)核的FLASH可編程系統(tǒng)器件) |
| UPSD3234A | Flash Programmable System Devices with 8032 Microcontroller Core |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPSD3233A-24T1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3233A-24T1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core |
| UPSD3233A-24T6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3233A-24T6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core |
| UPSD3233A-24U1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
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