參數(shù)資料
型號： uPSD3233
廠商： 意法半導體
英文描述： Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
中文描述： 閃存可編程系統(tǒng)器件與8032微控制器內核（嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器）
文件頁數(shù)： 112/164頁
文件大?。?/td> 1133K
代理商： UPSD3233
μ
PSD3200 FAMILY
112/164
DRAFT(Thursday 20 June 2002, 13:15).
Output Macrocell (OMC)
Eight of the Output Macrocells (OMC) are con-
nected to Ports A and B pins and are named as
McellAB0-McellAB7. The other eight macrocells
are connected to Ports B and C pins and are
named as McellBC0-McellBC7. If an McellAB out-
put isnot assigned to a specific pin in PSDsoft,the
Macrocell Allocator blockassigns it toeither PortA
or B. Thesame istrue for a McellBC outputon Port
B or C. Table 89 shows the macrocells and port
assignment.
The Output Macrocell (OMC) architecture is
shown in Figure 58. As shown in the figure, there
are native product terms available from the AND
Array, and borrowed product terms available (if
unused) fromother Output Macrocells(OMC). The
polarity of the product term is controlled by the
XOR gate. The Output Macrocell (OMC) can im-
plement either sequential logic, using the flip-flop
element, or combinatorial logic. The multiplexer
selects between the sequential or combinatorial
logic outputs. The multiplexer output can drive a
port pin and has a feedback path to the AND Array
inputs.
The flip-flop in the Output Macrocell (OMC) block
can be configured as a D,T, JK, or SRtype in PS-
Dsoft. The flip-flop’sclock, preset, and clear inputs
may be driven from a product term of the AND Ar-
ray. Alternatively, CLKIN (PD1) can be used for
the clock input to the flip-flop. The flip-flop is
clocked on the rising edge of CLKIN (PD1). The
preset and clear are active High inputs. Each clear
input can use up to two product terms.
Table 89. Output Macrocell Port and Data Bit Assignments
Note: 1. McellAB0-McellAB7 can only be assigned to Port B in the 52-pin package
Output
Macrocell
Port
Assignment
1
Native Product Terms
Maximum Borrowed
Product Terms
Data Bit for Loading or
Reading
McellAB0
Port A0, B0
3
6
D0
McellAB1
Port A1, B1
3
6
D1
McellAB2
Port A2, B2
3
6
D2
McellAB3
Port A3, B3
3
6
D3
McellAB4
Port A4, B4
3
6
D4
McellAB5
Port A5, B5
3
6
D5
McellAB6
Port A6, B6
3
6
D6
McellAB7
Port A7, B7
3
6
D7
McellBC0
Port B0, C0
4
5
D0
McellBC1
Port B1, C1
4
5
D1
McellBC2
Port B2, C2
4
5
D2
McellBC3
Port B3, C3
4
5
D3
McellBC4
Port B4, C4
4
6
D4
McellBC5
Port B5, C5
4
6
D5
McellBC6
Port B6, C6
4
6
D6
McellBC7
Port B7, C7
4
6
D7
相關PDF資料
PDF描述
uPSD3234(中文) Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
uPSD3212C(中文) Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM(帶8032微控制器內核和16Kbit SRAM的FLASH可編程系統(tǒng)器件)
uPSD3254A(中文) Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內核的FLASH可編程系統(tǒng)器件)
uPSD3254BV(中文) Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內核的FLASH可編程系統(tǒng)器件)
UPSD3234A Flash Programmable System Devices with 8032 Microcontroller Core
相關代理商/技術參數(shù)
參數(shù)描述
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