參數(shù)資料
型號(hào): uPSD3233
廠商: 意法半導(dǎo)體
英文描述: Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
中文描述: 閃存可編程系統(tǒng)器件與8032微控制器內(nèi)核(嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器)
文件頁數(shù): 41/164頁
文件大?。?/td> 1133K
代理商: UPSD3233
41/164
μ
PSD3200 FAMILY
DRAFT(Thursday 20 June 2002, 13:15).
I/O PORTS (MCU MODULE)
The MCU Module has three five ports: Port0,
Port1, Port2, Port3 and Port 4. (Refer to the PSD
Module section on I/O ports A,B,C and D). Port0
and 2 are available only in the 80 pin package and
are dedicated to drive the external MCU data and
address bus. Ports P0 and P2 are dedicated for
the externaladdress and data bus and is not avail-
able in the 80 pin package devices.
Port1 - Port3 are thesame as in the standard8032
micro-controllers, with the exception of the addi-
tional special peripheral functions. All ports are bi-
directional. Pins of which the alternative function is
not used may be used as normal bi-directional I/O.
The use of Port1- Port4 pins as alternative func-
tions
are
carried
out
μ
PSD3200 Family provided the associated SFR
bit is set HIGH.
automatically
by
the
Table 28.
The followingSFRregisters are used to control the
mapping of alternate functions onto the I/O port
bits. Port 1 alternate functions are controlled using
the P1SFS register, except for Timer 2 and the
2nd UART which are enabled by their configura-
tion registers. P1.0 to P1.3 are default to GPIO af-
ter reset.
Port 3 pins 6 and 7 have been modified from the
standard 8032. These pins that were used for
Read and Write control signals are now GPIO or
I
2
C bus pins. The Read and Write pins are as-
signed to dedicated pins.
Port 3 and Port 4 alternate functions are controlled
using the P3SFS and P4SFS SpecialFunction Se-
lection registers. After a Reset, the I/O pins default
to GPIO. The alternate function is enabled if the
corresponding bit in the PXSFS register is set to 1.
Table 29. P1SFS (91H)
Table 30. P3SFS (93H)
Table 31. P4SFS (94H)
Port Name
Main Function
Alternate
Port 1
GPIO
Timer 2 - Bits 0,1
2nd UART - Bits 2,3
ADC - Bits 4..7
Port 3
GPIO
UART - Bits 0,1
Interrupt - Bits 2,3
Timers - Bits 4,5
I
2
C - Bits 6,7
Port 4
GPIO
DDC - Bits 0..2
PWM - Bits 3..7
USB +/-
USB +/- Only
7
6
5
4
3
2
1
0
0=Port 1.7
1=ACH3
0=Port 1.6
1=ACH2
0=Port 1.5
1=ACH1
0=Port 1.4
1=ACH0
Bits Reserved
Bits Reserved
7
6
5
4
3
2
1
0
0 = Port 1.7
1 = SCL
from I
2
C unit
0 = Port 1.6
1 = SDA
from I
2
C unit
Bits are reserved.
7
6
5
4
3
2
1
0
0=Port 4.7
1=Reserved
0=Port 4.6
1=PWM 3
0=Port 4.5
1=PWM 2
0=Port 4.4
1=PWM 1
0=Port 4.3
1=PWM 0
0=Port 4.2
1=Vsync
0=Port 4.1
1=DDC -
SCL
0=Port 4.0
1=DDC -
SDA
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