參數(shù)資料
型號(hào)： uPSD3233
廠商： 意法半導(dǎo)體
英文描述： Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
中文描述： 閃存可編程系統(tǒng)器件與8032微控制器內(nèi)核（嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器）
文件頁(yè)數(shù)： 55/164頁(yè)
文件大?。?/td> 1133K
代理商： UPSD3233
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μ
PSD3200 FAMILY
DRAFT(Thursday 20 June 2002, 13:15).
Table 44. Description of the SCON Bits
Baud Rates.
The baud rate in Mode 0 is fixed:
Mode 0 Baud Rate = fosc / 12
The baud rate in Mode 2 depends on the value of
bit SMOD = 0 (which is the value on reset), the
baud rate is 1/64 theoscillator frequency. If SMOD
= 1, the baud rate is 1/32 theoscillator frequency.
Mode 2 Baud Rate = (2
SMOD
/ 64) x fosc
In the
μ
PSD3200 Family, the baud ratesin Modes
1 and 3 are determined by the Timer 1 overflow
rate.
Using Timer 1 to Generate Baud Rates.
When
Timer 1 is used as the baud rate generator, the
baud rates in Modes 1 and 3 are determined by
the Timer 1 overflow rate and the value of SMOD
as follows
Mode 1,3 Baud Rate = (2
SMOD
/ 32) x (Timer 1
overflow Rate)
The Timer 1 interruptshould be disabled inthis ap-
plication. TheTimer itself can be configured for ei-
ther “timer” or “counter”operation, and in any of its
3 running modes. In the most typical applications,
it is configuredfor “timer” operation, in the auto-re-
load mode (high nibble of TMOD = 0010B). In that
case the baud rate is given by the formula:
Mode 1,3 Baud Rate = = (2
SMOD
/ 32) x (fosc / 12
x [256 - (TH1)]
One can achieve very low baud rates with Timer 1
by leaving the Timer 1 interruptenabled, and con-
figuring the Timer to runas a 16-bit timer (high nib-
ble of TMOD = 0001B), and using the Timer 1
interrupt to do a 16-bit software reload. Figure 21
lists various commonly used baud rates and how
they can be obtained from Timer 1.
Using Timer/Counter 2 to Generate Baud
Rates.
In the
μ
PSD3200 Family,Timer 2 selected
as the baud rate generator by setting TCLK and/or
RCLK (see Figure 21 Timer/ Counter 2 Control
Register (T2CON)). Note that the baud rate for
transmit and receive can be simultaneously differ-
ent. Setting RCLK and/orTCLK puts Timer into its
baud rate generator mode.
The RCLK and TCLK bits in the T2CON register
configure UART 1. The RCLK1 and TCLK1 bits in
the PCON register configure UART 2.
The baud rate generator mode is similar to the
auto-reload mode, in that a rollover in TH2causes
the Timer 2 registersto be reloaded with the 16-bit
value in registers RCAP2H and RCAP2L, which
are preset by software.
Now, the baud rates in Modes 1 and 3 are deter-
mined at Timer 2’s overflow rate as follows:
Mode 1,3 Baud Rate = Timer 2 Overflow Rate / 16
The timer can be configured for either “timer” or
“counter” operation. In the most typical applica-
tions, it is configured for “timer” operation (C/T2 =
0). “Timer” operation is a little different for Timer 2
when it’s being used as a baud rate generator.
Normally, as a timer it would increment every ma-
chine cycle (thus at the 1/6the CPU clock frequen-
cy). In the case, the baud rate is given by the
formula:
Bit
Symbol
Function
7
SM0
(SM1,SM0)=(0,0): Shift Register.Baud rate = f
OSC
/12
(SM1,SM0)=(1,0): 8-bit UART. Baud rate = variable
(SM1,SM0)=(0,1): 8-bit UART. Baud rate = f
OSC
/64 or f
OSC
/32
(SM1,SM0)=(1,1): 8-bit UART. Baud rate = variable
6
SM1
5
SM2
Enables the multiprocessor communication features in mode 2 and 3. In mode 2 or 3, if
SM2 is set ot 1, R1 will not be activated if its received 8th data bit (RB8) is 0. In mode 1,
if SM2=1, R1 will not be activated if a valid stop bit was not recieved. In mode 0, SM2
should be 0
4
REN
Enables serial reception. Set by software to enable reception. Clear by software to
disable reception
3
TB8
The 8th data bit that will be transmitted in modes 2 and 3. Set or clear by software as
desired
2
RB8
In modes 2 and 3, this bit contains the 8th data bit that was received. In mode 1, if
SM2=0, RB8 is the snap bit that was received. In mode 0, RB8 is not used
1
TI
Transmit interrupt flag. Set by hardware at the end of the 8th bit time in mode 0, orat the
beginning of the stop bit in the other modes, in any serial transmission. Must be cleared
by software
0
RI
Receive interrupt flag. Set by hardware at the end of the 8th bit time in mode 0, or
halfway through the stop bit in the other modes, in any serial reception (except for SM2).
Must be cleared by software
相關(guān)PDF資料
PDF描述
uPSD3234(中文) Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
uPSD3212C(中文) Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM(帶8032微控制器內(nèi)核和16Kbit SRAM的FLASH可編程系統(tǒng)器件)
uPSD3254A(中文) Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內(nèi)核的FLASH可編程系統(tǒng)器件)
uPSD3254BV(中文) Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內(nèi)核的FLASH可編程系統(tǒng)器件)
UPSD3234A Flash Programmable System Devices with 8032 Microcontroller Core
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPSD3233A-24T1 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3233A-24T1T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core
UPSD3233A-24T6 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3233A-24T6T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core
UPSD3233A-24U1 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
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