參數(shù)資料
型號: PM5372-BI
英文描述: Telecommunication IC
中文描述: 通信集成電路
文件頁數(shù): 95/169頁
文件大?。?/td> 989K
代理商: PM5372-BI
TSE Transmission Switch Element Datasheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1991258, Issue 7
95
OFAAIS
The out of frame alignment alarm indication signal (OFAAIS) is set high to force insertion of
the high order path AIS, K28.4- character in the data stream if the corresponding R8FA block
is in the out of frame alignment state.
RXINV
The receive data invert bit (RXINV) controls the active polarity of the incoming data stream.
When RXINV is set high, the data is complemented before any processing by the
corresponding R8FA. When RXINV is set low, data is not complemented before R8FA
processing.
J0MASK
The J0 masking bit (J0MASK) controls the overwriting of K28.5 characters in the datastream.
When J0MASK is set high, K28.5 characters are replaced by either D12.3-: “001101 0011” or
D12.3+: “001101 1100” characters. This mode of operation prevents spurious K28.5
characters resulting from floating links or bit errors from passing through the TSE and
disrupting framing in downstream devices. When J0MASK is set low, K28.5 characters on
the datastream are not replaced. If J0/Z0 switching is enabled using the IJ0RORDER and
EJ0RORDR bits, then J0 masking is recommended to prevent reordering of the K28.5
character and disruption of downstream framers.
Reserved
The Reserved bit must be set to the indicated default value for correct operation of the TSE.
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