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參數(shù)資料
| 型號(hào)： | PM5372-BI |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁(yè)數(shù)： | 4/169頁(yè) |
| 文件大?。?/td> | 989K |
| 代理商： | PM5372-BI |
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TSE Transmission Switch Element Datasheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1991258, Issue 7
4
Revision History
Issue
No.
Issue
Date
Details of Change
7
November
2001
Changed signoff page.
Fixed Initialization procedure instruction referencing addresses 0N83h,
0N8Bh, 0N93h, 0N9Bh
Updated voltage limits on digital/LVDS pins in Absolute Maximum Ratings
table. Deleted Ambient Temperature spec. Fixed 1.8V Supply Voltage spec.
Added note to LCVI that it is change from no LCV to LCV that cause LCVI.
A string of LCVs will only produce 1 LCVI .
Consolidated power information (sequencing/filtering) to Power Information
Section. Added power requirements section. Removed IDDOP for the power
supplies from the D.C Characteristics table.
Updated Thermal section. Thermal section now indicates device suitable
industrial applications when used with heat sink.
Updated LVDS Hot Swap Section.
Added RC filter example schematic in Power Filtering section
Updated TelecomBus Control Character Table
6
August
2001
Reworded DLCV description: Added warning of LCV counter saturation if
DLCV set high, and clarified to indicate that inverted data would have valid
and invalid 8B/10B characters as result of DLCV high
Changed the name of the IDLESEL control signal ECHAR_OVWR, and
made corresponding changes to the description of the ID[9:0] data bits
Updated thermal information in sec 18
Revised power sequencing information, added max junction temp, Theta JA
and Theta JC information, and chart of Theta JA vs. airflow
Added sections for LVDS hot swap information, power down calculations,
and trace length versus FIFO depth calculation
Changed name of ETSE register bit in register 0NAAH to EACTIVE, hid
references to TCBMODE in sec 9.2 and in description of register 0NB0H
The device ID field is now “0001 instead of “0000” in register 0010H.
The JTAG Version number has been changed to 1H in Table 16.
The J0MASK bit has been added to registers 0N80H, 0N88H,
0N90H, 0N98H to support applications which require floating input
links to remain activated.
Added the IJ0RORDR bit to register 0NA2.
Added the EJ0R0RDR bit to register ONAA.
5
March
2001
Added warning of LCV counter saturation if DLCV set high.in register
descriptions
Changed the name of the IDLESEL control signal to CHARACTER
OVERWRITE, and made corresponding changes to the description of the
ID[9:0] data bits
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PM5380 | PMC-2010299 S/UNI-8x155 Telecom Standard Product Data Sheet [1.91 MB] |
| PM554 | Programmable Quad Supply Monitor with Adjustable Reset and Watchdog Timers; Package: SSOP; No of Pins: 16; Temperature Range: -40°C to +85°C |
| PM555 | 1 to 10 watt encapsulated power modules |
| PM556 | Precision Quad Supply Monitor in 6-Lead SOT-23; Package: SOT; No of Pins: 6; Temperature Range: 0°C to +70°C |
| PM560 | Precision Quad Supply Monitor in 6-Lead SOT-23; Package: SOT; No of Pins: 6; Temperature Range: 0°C to +70°C |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PM5372BIP | 制造商:PMC-Sierra 功能描述: |
| PM5372-BI-P | 制造商:PMC-Sierra 功能描述: |
| PM5376HFI | 制造商:PMC-Sierra 功能描述: |
| PM5377 | 制造商:PMC 制造商全稱(chēng):PMC 功能描述:Single Chip 96-Port STS-1/STM-0 Cross-Connect |
| PM537CE | 制造商:ARTESYN 制造商全稱(chēng):Artesyn Technologies 功能描述:Single, dual and triple output 1 to 10.5 Watt AC/DC encapsulated modules |
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