參數(shù)資料
型號: PM5372-BI
英文描述: Telecommunication IC
中文描述: 通信集成電路
文件頁數(shù): 157/169頁
文件大?。?/td> 989K
代理商: PM5372-BI
TSE Transmission Switch Element Datasheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1991258, Issue 7
157
17 Microprocessor Interface Timing Characteristics
Ta=-40°C to Tj=+125°C, VVDDI = VVDDItypical ± 5%, VVDDO = VDDOtypical ± 5%
(Typical Conditions: TJ = 25°C, VVDDI = 1.8V, VVDDO = 3.3V)
Table 21 Microprocessor Interface Read Access
Symbol
Parameter
Min
Max
Units
tSar
Address to Valid Read Set-up Time
10
ns
tHar
Address to Valid Read Hold Time
5
ns
tSalr
Address to Latch Set-up Time
10
ns
tHalr
tVl
Address to Latch Hold Time
10
ns
Valid Latch Pulse Width
5
ns
tSlr
Latch to Read Set-up
0
ns
tHlr
Latch to Read Hold
5
ns
tPrd
Valid Read to Valid Data Propagation Delay
70
ns
tZrd
Valid Read Negated to Output Tri-state
20
ns
tZinth
Valid Read Negated to INTB High (WCIMODE=0)
50
ns
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