- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369993 > pentium II xeon processor (Intel Corp.) pentium II xeon processor at 400 and 450 MHZ(工作頻率400和450兆赫茲奔II處理器) PDF資料下載
參數(shù)資料
| 型號： | pentium II xeon processor |
| 廠商： | Intel Corp. |
| 英文描述： | pentium II xeon processor at 400 and 450 MHZ(工作頻率400和450兆赫茲奔II處理器) |
| 中文描述： | 奔騰II至強處理器400和450兆赫（工作頻率400和450兆赫茲奔二處理器） |
| 文件頁數(shù)： | 11/97頁 |
| 文件大小： | 978K |
| 代理商： | PENTIUM II XEON PROCESSOR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁
E
PENTIUM II XEON PROCESSOR AT 400 AND 450 MHZ
11
12/15/98 5:14 PM 24377002.doc
2.3.1.
PENTIUM
II XEON PROCESSOR
V
CCCORE
Regulator solutions must provide bulk capacitance
with a low Effective Series Resistance (ESR) and
the system designer must also control the
interconnect resistance from the regulator (or VRM
pins) to the
330-contact slot
connector
. Simulation
is required. Bulk decoupling for the large current
swings when the part is powering on, or
entering/exiting low power states, is provided on the
voltage regulation module (VRM) defined in the
VRM 8.2 DC–DC Converter Design Guidelines and
the VRM 8.3 DC–DC Converter Design Guidelines.
The input to V
CCCORE
should be capable of
delivering a recommended minimum dI
CCCORE
/dt
defined in Table 6 while maintaining the required
tolerances defined in Table 5. See the Pentium
II
Xeon Processor Power DistributionGuidelines.
2.3.2.
LEVEL 2 CACHE DECOUPLING
Regulator
capacitance with a low Effective Series Resistance
(ESR) in order to meet the tolerance requirements
for V
CCL2
. Use similar design practices as those
recommended for V
CCCORE
. See the Pentium
II
Xeon Processor Power DistributionGuidelines.
solutions
need
to
provide
bulk
2.3.3.
SYSTEM BUS AGTL+ DECOUPLING
The Pentium II Xeon processor contains high
frequency decoupling capacitance on the processor
substrate; bulk decoupling must be provided for by
the system motherboard for proper AGTL+ bus
operation. High frequency decoupling may be
necessary at the
SC330
connector
to further
improve signal integrity if noise is picked up at the
connector interface. See the Pentium
II Xeon
Processor Power DistributionGuidelines.
2.4.
System Bus Clock and
Processor Clocking
The BCLK input directly controls the operating
speed of the system bus interface. All system bus
timing parameters are specified with respect to the
rising edge of the BCLK input, measured at the
processor core. The Pentium II Xeon processor
core frequency must be configured during Reset by
using the A20M#, IGNNE#, LINT[1]/NMI, and
LINT[0]/INTR pins (see Table 1). The value on
these pins during Reset determines the multiplier
that the Phase Lock Loop (PLL) will use for the
internal core clock. See the Pentium
Pro
Processor Family Developer’s Manualfor the
definition of these pins during reset and the
operation of the pins after reset.
NOTE
The frequency multipliers supported are
shown in Table 1; other combinations will not
be validated nor supported by Intel. Also,
each multiplier is only valid for use on the
product of the frequency indicated in Table 1.
Clock multiplying within the processor is provided
by the internal PLL, requiring a constant frequency
BCLK input. The BCLK frequency ratio cannot be
changed dynamically during normal operation or
any low power modes. The BCLK frequency ratio
can be changed when RESET# is active, assuming
that all Reset specifications are met.
相關PDF資料 |
PDF描述 |
|---|---|
| Pentium III cpu with mobile | Pentium III processor Mobile Module Connector 2 (MMC-2)(帶移動模塊連接器2奔III處理器) |
| pentium III CPU | Pentium III Processor for the SC242 at 450MHz to 1.0GHz(SC242工作頻率450MHZ到1GHZ奔III處理器) |
| pentium III processor | 32 bit Processor Mobile Module(32 位帶移動模塊處理器) |
| Pentium OverDrive Processor | Pentium OverDrive Processor With MMX Technology For Pentium Processor-Based System(帶MMX技術奔騰超速轉(zhuǎn)動處理器) |
| pentium pro processor | Pentium Pro Processor with 1MB L2 Cache at 200MHZ(1兆比特L2高速緩存頻率200兆赫茲處理器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| P-ENV568K3G3 | 制造商:Panasonic Industrial Company 功能描述:TUNER |
| PEO14012 | 制造商:TE Connectivity 功能描述:RELAY SPCO 12VDC |
| PEO14024 | 制造商:TE Connectivity 功能描述:RELAY SPCO 24VDC |
| PEO96742 | 制造商:Delphi Corporation 功能描述:ASM TERM |
| PEOODO3A | 制造商:MACOM 制造商全稱:Tyco Electronics 功能描述:Versatile Power Entry Module with Small Footprint |
發(fā)布緊急采購，3分鐘左右您將得到回復。