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參數(shù)資料
| 型號： | NS32490D |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | NIC Network Interface Controller(NIC網(wǎng)絡(luò)接口控制器) |
| 中文描述： | NIC網(wǎng)絡(luò)接口控制器（NIC網(wǎng)絡(luò)接口控制器） |
| 文件頁數(shù)： | 3/56頁 |
| 文件大?。?/td> | 689K |
| 代理商： | NS32490D |
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3.0 Functional Description
(Continued)
Because the NIC must buffer the Address field of each in-
coming packet to determine whether the packet matches its
Physical Address Registers or maps to one of its Multicast
Registers, the first local DMA transfer does not occur until 8
bytes have accumulated in the FIFO.
To assure that there is no overwriting of data in the FIFO,
the FIFO logic flags a FIFO overrun as the 13th byte is
written into the FIFO; this effectively shortens the FIFO to
13 bytes. In addition, the FIFO logic operates differently in
Byte Mode than in Word Mode. In Byte Mode, a threshold is
indicated when the n
a
1 byte has entered the FIFO; thus,
with an 8-byte threshold, the NIC issues Bus Request
(BREQ) when the 9th byte has entered the FIFO. For Word
Mode, BREQ is not generated until the n
a
2 bytes have
entered the FIFO. Thus, with a 4 word threshold (equivalent
to an 8-byte threshold), BREQ is issued when the 10th byte
has entered the FIFO.
PROTOCOL PLA
The protocol PLA is responsible for implementing the IEEE
802.3 protocol, including collision recovery with random
backoff. The Protocol PLA also formats packets during
transmission and strips preamble and synch during recep-
tion.
DMA AND BUFFER CONTROL LOGIC
The DMA and Buffer Control Logic is used to control two
16-bit DMA channels. During reception, the Local DMA
stores packets in a receive buffer ring, located in buffer
memory. During transmission the Local DMA uses pro-
grammed pointer and length registers to transfer a packet
from local buffer memory to the FIFO. A second DMA chan-
nel is used as a slave DMA to transfer data between the
local buffer memory and the host system. The Local DMA
and Remote DMA are internally arbitrated, with the Local
DMA channel having highest priority. Both DMA channels
use a common external bus clock to generate all required
bus timing. External arbitration is performed with a standard
bus request, bus acknowledge handshake protocol.
4.0 Transmit/Receive Packet
Encapsulation/Decapsulation
A standard IEEE 802.3 packet consists of the following
fields: preamble, Start of Frame Delimiter (SFD), destination
address, source address, length, data, and Frame Check
Sequence (FCS). The typical format is shown in Figure 2.
The packets are Manchester encoded and decoded by the
DP8391 SNI and transferred serially to the NIC using NRZ
data with a clock. All fields are of fixed length except for the
data field. The NIC generates and appends the preamble,
SFD and FCS field during transmission. The Preamble and
SFD fields are stripped during reception. (The CRC is
passed through to buffer memory during reception.)
PREAMBLE AND START OF FRAME DELIMITER (SFD)
The Manchester encoded alternating 1,0 preamble field is
used by the SNI (DP8391) to acquire bit synchronization
with an incoming packet. When transmitted each packet
contains 62 bits of alternating 1,0 preamble. Some of this
preamble will be lost as the packet travels through the net-
work. The preamble field is stripped by the NIC. Byte align-
ment is performed with the Start of Frame Delimiter (SFD)
pattern which consists of two consecutive 1’s. The NIC
does not treat the SFD pattern as a byte, it detects only the
two bit pattern. This allows any preceding preamble within
the SFD to be used for phase locking.
DESTINATION ADDRESS
The destination address indicates the destination of the
packet on the network and is used to filter unwanted pack-
ets from reaching a node. There are three types of address
formats supported by the NIC: physical, multicast, and
broadcast. The physical address is a unique address that
corresponds only to a single node. All physical addresses
have an MSB of ‘‘0’’. These addresses are compared to the
internally stored physical address registers. Each bit in the
destination address must match in order for the NIC to ac-
cept the packet. Multicast addresses begin with an MSB of
‘‘1’’. The DP8390D filters multicast addresses using a stan-
dard hashing algorithm that maps all multicast addresses
into a 6-bit value. This 6-bit value indexes a 64-bit array that
filters the value. If the address consists of all 1’s it is a
broadcast address, indicating that the packet is intended for
all nodes. A promiscuous mode allows reception of all pack-
ets: the destination address is not required to match any
filters. Physical, broadcast, multicast, and promiscuous ad-
dress modes can be selected.
SOURCE ADDRESS
The source address is the physical address of the node that
sent the packet. Source addresses cannot be multicast or
broadcast addresses. This field is simply passed to buffer
memory.
LENGTH FIELD
The 2-byte length field indicates the number of bytes that
are contained in the data field of the packet. This field is not
interpreted by the NIC.
DATA FIELD
The data field consists of anywhere from 46 to 1500 bytes.
Messages longer than 1500 bytes need to be broken into
multiple packets. Messages shorter than 46 bytes will re-
quire appending a pad to bring the data field to the minimum
length of 46 bytes. If the data field is padded, the number of
valid data bytes is indicated in the length field.
The NIC
does not strip or append pad bytes for short packets,
or check for oversize packets.
FCS FIELD
The Frame Check Sequence (FCS) is a 32-bit CRC field
calculated and appended to a packet during transmission to
allow detection of errors when a packet is received. During
reception, error free packets result in a specific pattern in
the CRC generator. Packets with improper CRC will be re-
jected. The AUTODIN II (X
32
a
X
26
a
X
23
a
X
22
a
X
16
a
X
12
a
X
11
a
X
10
a
X
8
a
X
7
a
X
5
a
X
4
a
X
2
a
X
1
a
1)
polynomial is used for the CRC calculations.
TL/F/8582–3
FIGURE 2
3
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