
TL/EE10818
N
PRELIMINARY
July 1991
NS32FX16-15/NS32FX16-20/NS32FX16-25
Imaging/Signal Processor
General Description
The NS32FX16 is a high-performance 32-bit member of the
Series 32000/EP
TM
family of National’s Embedded System
Processors
TM
specifically optimized for CCITT Group 2 and
Group 3 Facsimile Applications, Data Modems, Voice Mail
Systems, Laser Printers, or any combination of the above.
It can perform all the computations and control functions
required for a stand-alone Fax system, a PC add-in Fax/
Data Modem card or a Laser/Fax system.
It also meets the performance requirements to implement
9600 and 7200 bps modems complying with CCITT V.29
and V.27 standards.
The NS32FX16 provides a 16 Mbyte Linear external ad-
dress space and a 16-bit external data bus.
The CPU core, which is the same as that of the NS32CG16,
incorporates a 32-bit ALU and instruction pipeline, and an
8-byte prefetch queue.
Also integrated on-chip with the CPU are a DSP Module and
a 384-byte RAM Array. The DSP Module executes vector
operations on complex variables and is specially designed
to enhance performance in modem applications. The vector
operations can also be used to efficiently implement FIR
Filters and other DSP primitives. The on-chip RAM Array is
used to store the coefficients of the various filters and can
be accessed by both the CPU and the DSP Module.
The NS32FX16 capabilities can be expanded by using an
external floating point unit (FPU) which directly interfaces to
the NS32FX16 using the slave protocol. The CPU-FPU clus-
ter features high speed execution of the floating-point in-
structions.
The NS32FX16 highly-efficient architecture combined with
the NS32CG16 graphics instructions and the high-perform-
ance vector operation capability, makes the device the ideal
choice for Postscript
TM
and Fax applications.
Features
Y
Software compatible with the Series 32000/EP
processors
Y
Designed around the CPU core of the NS32CG16
Y
32-bit architecture and implementation
Y
On-chip DSP Module for high-speed DSP operations
Y
Special support for graphics applications
D 18 graphics instructions
D Binary compression/expansion capability for font
storage using RLL encoding
D Pattern magnification
D Interface to an external BITBLT processing units for
fast color BITBLT operations
Y
384-byte on-chip RAM array
Y
On-chip clock generator
Y
Floating-point support via the NS32081 or NS32181
Y
Optimal interface to large memory arrays via the
NS32CG821 and the DP84xx family of DRAM control-
lers
Y
Power save mode
Y
High-speed CMOS technology
Y
68-pin PLCC package
Block Diagram
TL/EE/10818–67
Series 32000
é
is a registered trademark of National Semiconductor Corporation.
EP
TM
and Embedded System Processors
TM
are trademarks of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M115/Printed in U. S. A.