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參數資料
| 型號： | NS32490D |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | NIC Network Interface Controller(NIC網絡接口控制器) |
| 中文描述： | NIC網絡接口控制器（NIC網絡接口控制器） |
| 文件頁數： | 27/56頁 |
| 文件大?。?/td> | 689K |
| 代理商： | NS32490D |
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10.0 Internal Registers
(Continued)
10.4 DMA REGISTERS
DMA Registers
TL/F/8582–61
The DMA Registers are partitioned into three groups; Trans-
mit, Receive and Remote DMA Registers. The Transmit reg-
isters are used to initialize the Local DMA Channel for trans-
mission of packets while the Receive Registers are used to
initialize the Local DMA Channel for packet Reception. The
Page Stop, Page Start, Current and Boundary Registers are
used by the Buffer Management Logic to supervise the Re-
ceive Buffer Ring. The Remote DMA Registers are used to
initialize the Remote DMA.
Note:
In the figure above, registers are shown as 8 or 16 bits wide. Although
some registers are 16-bit internal registers, all registers are accessed
as 8-bit registers. Thus the 16-bit Transmit Byte Count Register is
broken into two 8-bit registers, TBCR0 and TBCR1. Also TPSR,
PSTART, PSTOP, CURR and BNRY only check or control the upper 8
bits of address information on the bus. Thus they are shifted to posi-
tions 15-8 in the diagram above.
10.5 TRANSMIT DMA REGISTERS
TRANSMIT PAGE START REGISTER (TPSR)
This register points to the assembled packet to be transmit-
ted. Only the eight higher order addresses are specified
since all transmit packets are assembled on 256-byte page
boundaries. The bit assignment is shown below. The values
placed in bits D7–D0 will be used to initialize the higher
order address (A8–A15) of the Local DMA for transmission.
The lower order bits (A7–A0) are initialized to zero.
Bit Assignment
7
6
5
4
3
2
1
0
TPSR A15
A14
A13
A12
A11
A10
A9
A8
(A7–A0 Initialized to zero)
TRANSMIT BYTE COUNT REGISTER 0,1 (TBCR0, TBCR1)
These two registers indicate the length of the packet to be
transmitted in bytes. The count must include the number of
bytes in the source, destination, length and data fields. The
maximum number of transmit bytes allowed is 64k bytes.
The NIC will not truncate transmissions longer than 1500
bytes. The bit assignment is shown below:
7
6
5
4
3
2
1
0
TBCR1 L15
L14
L13
L12
L11
L10
L9
L8
7
6
5
4
3
2
1
0
TBCR0
L7
L6
L5
L4
L3
L2
L1
L0
10.6 LOCAL DMA RECEIVE REGISTERS
PAGE START STOP REGISTERS (PSTART, PSTOP)
The Page Start and Page Stop Registers program the start-
ing and stopping address of the Receive Buffer Ring. Since
the NIC uses fixed 256-byte buffers aligned on page bound-
aries only the upper eight bits of the start and stop address
are specified.
PSTART,PSTOP bit assignment
7
PSTART,
PSTOP
BOUNDARY (BNRY) REGISTER
6
5
4
3
2
1
0
A15
A14
A13
A12
A11
A10
A9
A8
This register is used to prevent overflow of the Receive
Buffer Ring. Buffer management compares the contents of
this register to the next buffer address when linking buffers
together. If the contents of this register match the next buff-
er address the Local DMA operation is aborted.
7
6
5
4
3
2
1
0
BNRY A15
A14
A13
A12
A11
A10
A9
A8
27
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