參數(shù)資料
型號： MC92604ZT
廠商： Freescale Semiconductor
文件頁數(shù)： 69/122頁
文件大?。?/td> 0K
描述： IC TXRX ETH DUAL GIG 196-MAPBGA
標準包裝： 630
類型： 收發(fā)器
驅(qū)動器/接收器數(shù)： 2/2
規(guī)程： 千兆位以太網(wǎng)
電源電壓： 4.5 V ~ 5.5 V
安裝類型： 表面貼裝
封裝/外殼： 196-LBGA
供應(yīng)商設(shè)備封裝： 196-MAPBGA（15x15）
包裝： 托盤
Receiver
MC92604 Dual Gigabit Ethernet Transceiver Reference Manual, Rev. 1
3-16
Freescale Semiconductor
required for the transmitter, so it is used to ‘enable COMMA detect.’ Data out of the receiver is
even-/odd-aligned with the two output clocks. COMMAs are initially aligned with the rising edge of
RECV_x_RCLK_B. The MC92604 will always initially perform even/odd alignment to the first COMMA
(K28.1, K28.5, or K28.7) code group encountered. If XMIT_x_K is low, it will not realign to any future
COMMAs that may appear in the data stream. If ‘enable COMMA detect’ is enabled (XMIT_x_K is high),
a data code group may be repeated to force this alignment if an IDLE is encountered in an ODD code
group.
The receiver interface error and status in TBI mode is shown in Table 3-11.
3.7.1.3
Double Data Rate Operation—RGMI and RTBI
Functionally, the double data rate operation (DDR is high) is identical to the previously mentioned receiver
GMII and TBI operating modes. The only difference is at the chip parallel data interfaces. Data outputs
are shared and defined uniquely, depending on each phase of the output clock (RECV_x_RCLK). The
RGMII and RTBI interfaces are shown in Table 3-12 and Table 3-13, respectively.
Table 3-11. Receiver Interface Error and Status Codes (TBI Mode)
RECV_x_
K1
1 RECV_x_K is not a standard TBI signal. These errors may be detected by monitoring only the10-bit data field since
the 3 error codes are not valid 10-bit encoded data.
RECV_x_
COMMA
RECV_x_
ERR
RECV_x_
DV
RECV_x_
[7:0]
Priority
2
2 The priority column shows the error that is reported if multiple errors occur at the same time. The lower numbered
priority errors are reported first.
Description
Low
Data[9]
Data[8]
Data[7:0]
6
Normal operation, non-COMMA
code group received.
Low
High
Data[9]
Data[8]
Data[7:0]
5
Normal operation, COMMA
(K28.1, K28.5, or K28.7) code
group received.
High
Don’t care
0x04
3
Overrun
High
Don’t care
0x02
3
Underrun
High
Don’t care
0x00
1
Not byte sync: the receiver is in
start-up or has lost byte alignment
and is searching for alignment.
Table 3-12. Receiver RGMII Interface
Clock Edge
RECV_x_DV
RECV_x_[3:0]
Rising
RX_DV
Data bit [3:0]
Falling
GMII_RX_ER (XOR) GMII_RX_DV
Data bit [7:4]
Table 3-13. Receiver RTBI Interface
Rising Edge of Clock
RECV_x_COMMA
RECV_x_DV
RECV_x_[3:0]
RECV_x_RCLK
COM_DET
Data bit 4
Data bit [3:0]
RECV_x_RCLK_B
COM_DET
Data bit 9
Data bit [8:5]
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