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參數(shù)資料
| 型號(hào)： | MC92604ZT |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 59/122頁(yè) |
| 文件大小： | 0K |
| 描述： | IC TXRX ETH DUAL GIG 196-MAPBGA |
| 標(biāo)準(zhǔn)包裝： | 630 |
| 類型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 2/2 |
| 規(guī)程： | 千兆位以太網(wǎng) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 196-LBGA |
| 供應(yīng)商設(shè)備封裝： | 196-MAPBGA（15x15） |
| 包裝： | 托盤 |
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Receiver
MC92604 Dual Gigabit Ethernet Transceiver Reference Manual, Rev. 1
Freescale Semiconductor
3-7
3.3.6
Receiver Redundant Link Operation
The MC92604 is configured as a single channel SerDes with redundant links if the enable redundancy
signal, ENAB_RED, is high. The channel A received data interface is active in this mode. This data will
be received from the appropriate link, as specified by the XCVR_RSEL input shown in Table 3-2.
ENAB_RED is considered a basic configuration input, meaning that it is assumed ENAB_RED will not
change states during operation. If the state of ENAB_RED is changed, then the part must be reset.
XCVR_RSEL input may be changed at any time. However, when the state of this input is changed, the
channel will lose synchronization and require COMMAs in the data stream to regain alignment.
3.4
Receiver Interface Configuration
The receiver interface facilitates transfer of received data to the system. Along with the data, information
is also provided on the status of the link. Table 3-1 describes the signals involved in the receiver
configuration and operation. The receiver interface, through which received data is obtained, may be
operated in five operating modes as described in Table 3-3.
The interface may be operated in the byte mode (8 bits) or in the 10-bit interface, TBI, mode. Received
data is a byte (8 bits) of uncoded data, when in the backplane byte or GMII modes. In these modes, the
internal 8B/10B decoder was used to decode data from the received 10-bit character. Byte interface mode
is enabled by negating TBIE low.
Received data is 10-bits of pre-coded data when in the 10-bit interface, TBI, mode. The internal 8B/10B
decoder is not used, and it is assumed that decoding is done externally. The 10-bit interface mode is
enabled by asserting TBIE high.
The received data is presented on the interface RECV_x_7 through RECV_x_0 signals when operating in
the GMII or 8-bit backplane modes. In the 10-bit backplane or TBI modes, RECV_x_ERR, RECV_x_DV
become bits 9 and 8, respectively.
Table 3-2. Receiver Redundant Link Operation
ENAB_RED
XCVR_RSEL
Action
0
Do not care
Channel A data is received from RLINK_A_P / RLINK_A_N.
1
0
Channel A data is received from RLINK_A_P / RLINK_A_N.
1
Channel A data is received from RLINK_B_P / RLINK_B_N.
Table 3-3. MC92604 Receiver Operating Modes (Common Features/Characteristics)
Operating Mode
BSYNC
COMPAT
TBIE
Backplane 10- or 5-bit coded data modes—non-aligned
Low
High
Backplane 10- or 5-bit coded data modes—aligned
High
Low
High
Backplane 8- or 4-bit byte modes
High
Low
GMII or RGMII compatible mode
High
Low
TBI or RTBI compatible mode
High
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