參數(shù)資料
型號： MC68HC916X1CTH16
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP120
封裝： QFP-120
文件頁數(shù)： 51/172頁
文件大?。?/td> 1200K
代理商： MC68HC916X1CTH16
MOTOROLA
MC68HC916X1
144
MC68HC916X1TS/D
1. Applies to :
Port ADA[5:0] — AN[5:0]
Port E[7:4], 1 — SIZ[1:0], AS, DS
Port F[7:6], 0 — IRQ[7:6], MODCLK
Port GP[7:0] — IC4/OC5/OC1, IC[3:1], OC[4:1]/OC1
Port QS[7:0] — TXD, PCS[3:1], PCS0/SS, SCK, MOSI, MISO
BKPT/DSCLK, DSI/IPIPE1, PAI, PCLK, RESET, RXD, TSC
EXTAL (when PLL enabled)
2. This parameter is periodically sampled rather than 100% tested.
3. Input-Only Pins: EXTAL, TSC, BKPT/DSCLK, PAI, PCLK, RXD
Output-Only Pins: ADDR[2:0], BG/CSM, CLKOUT, FREEZE/QUOT, DSO/IPIPE0, PWMA, PWMB
Group 1: Port GP[7:0] — IC4/OC5/OC1, IC[3:1], OC[4:1]/OC1
DATA[15:0], DSI/IPIPE1
Group 2: Port C[3:0] — ADDR19/CS6, FC[2:0]/CS5/CS3
Port E[7:4], 1 — SIZ[1:0], AS, DS, DSACK1
Port F[7:6], 0 — IRQ[7:6], MODCLK
Port QS[7:3] — TXD, PCS[3:1], PCS0/SS
ADDR23/CS10/ECLK, ADDR[18:0], R/W, BERR, BR/CS0, BG/CSM, BGACK/CSE
4. Does not apply to RESET because it is an open drain pin. Does not apply to Port QS[7:0] (TXD,
PCS[3:1], PCS0/SS, SCK, MOSI, MISO) in wired-OR mode.
5. Use of an active pulldown device is recommended.
6. Total operating current is the sum of the appropriate IDD, IDDSYN, and ISB values, plus IDDA. IDD values
include supply currents for device modules powered by VDDE and VDDI pins.
7. Current measured at maximum system clock frequency, all modules active.
8. The SRAM module will not switch into standby mode as long as VSB does not exceed VDD by more than 0.5
volts. The SRAM array cannot be accessed while the module is in standby mode.
9. When VSB is more than 0.3 V greater than VDD, current flows between the VSTBY and VDD pins, which
causes standby current to increase toward the maximum transient condition specification. System noise on the
VDD and VSTBY pin can contribute to this condition.
10. Power dissipation is measured at maximum system clock frequency, all modules active. Power dissipation can be
calculated using the following expression:
PD = Maximum VDD (IDD + IDDSYN + ISB) + Maximum VDDA (IDDA)
IDD includes supply currents for all device modules powered by VDDE and VDDI pins.
18
Load Capacitance3
Group 1 I/O Pins, CLKOUT, FREEZE/QUOT, IPIPE0
Group 2 I/O Pins and BG/CSM
Group 3 I/O Pins
Group 4 I/O Pins
CL
—
90
100
130
200
pF
Table 77 DC Characteristics (Continued)
(V
DD
and V
DDSYN
= 5.0 Vdc
±10%, V
SS
= 0 Vdc, T
A
= T
L
to T
H)
Num
Characteristic
Symbol
Min
Max
Unit
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
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PDF描述
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