參數(shù)資料
型號： MC68HC916X1CTH16
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP120
封裝： QFP-120
文件頁數(shù)： 31/172頁
文件大?。?/td> 1200K
代理商： MC68HC916X1CTH16
MOTOROLA
MC68HC916X1
126
MC68HC916X1TS/D
FRZ — Freeze Mode Control
0 = Disable program/erase voltage while FREEZE is asserted
1 = Allow ENPE bit to turn on the program/erase voltage while FREEZE is asserted
BOOT — Boot Control
0 = Flash EEPROM module responds to bootstrap addresses after reset
1 = Flash EEPROM module does not respond to bootstrap addresses after reset
On reset, BOOT takes on the value stored in its associated shadow bit. If BOOT = 0 and STOP = 0, the
module responds to program space accesses to IMB addresses $000000 to $000006 following reset,
and the contents of FEExBS[3:0] are used as bootstrap vectors. After address $000006 is read, the
module responds normally to control block or array addresses only.
LOCK — Lock Registers
0 = Write-locking disabled
1 = Write-locked registers protected
If the reset state of LOCK is zero, it can be set once after reset to allow protection of the registers after
initialization. Once the LOCK bit is set by software, it cannot be cleared again until after a reset.
ASPC[1:0] — Flash EEPROM Array Space
ASPC[1:0] assigns the array to supervisor or user space, and to program or data space. The state of
ASPC[1:0] out of reset is determined by the value stored in the associated shadow bits. Since the
CPU16 runs only in supervisor mode, ASPC1 must remain set to one for array accesses to take place.
The field can be written only when LOCK = 0 and STOP = 1. Refer to Table 66.
WAIT[1:0] — Wait States
The state of WAIT[1:0] out of reset is determined by the value stored in the associated shadow bits.
WAIT[1:0] specifies the number of wait states inserted during accesses to the flash EEPROM module.
A wait state has the duration of one system clock cycle. WAIT[1:0] affects both control block and array
accesses, and can be written only if LOCK = 0 and STOP = 1. Refer to Table 67.
The value of WAIT[1:0] is compatible with the lower two bits of the DSACK field in the SCIM chip-select
option registers. An encoding of %11 in WAIT[1:0] corresponds to an encoding for fast termination.
FEE1TST, FEE2TST — Flash EEPROM Test Registers
$YFF802, $YFF822
These registers are used for factory test only.
Table 66 Array Space Encoding
ASPC[1:0]
Type of Access
10
Supervisor program and data space
11
Supervisor program space
Table 67 Wait State Encoding
WAIT[1:0]
Wait States
Clocks Per Transfer
00
0
3
01
1
4
10
2
5
11
–1
2
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關PDF資料
PDF描述
MC916X1CTH16B1 16-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP120
SPMC916X1CTH16 16-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP120
MC68HCL05J1ADWR2 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20
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