參數(shù)資料
型號： MC68HC916X1CTH16
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP120
封裝： QFP-120
文件頁數(shù)： 116/172頁
文件大?。?/td> 1200K
代理商： MC68HC916X1CTH16
MOTOROLA
MC68HC916X1
48
MC68HC916X1TS/D
Port F is a single register that can be accessed in two locations. It can be read or written at any time,
including when the MCU is in emulator mode.
The bits in this register control the direction of port F pin drivers when the pins are configured for I/
O. Setting any bit in this register configures the corresponding pin as an output. Clearing any bit in
this register configures the corresponding pin as an input.
The fields in this register determine the functions of pairs of port F pins. Table 33 shows port F pin
assignments. Table 34 shows PFPAR pin functions.
In single-chip mode (BERR = 0 during reset), this register is set to $00, defining all port F pins to be
I/O pins. In 8- and 16-bit expanded modes, the state of DATA9 during reset determines the default
value for PFPAR.
1. PF[5:2] are not connected. These bits have no meaning.
2. MODCLK signal is only recognized during reset.
DDRF — Port F Data Direction Register
$YFFA1D
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NOT USED
DDF7
RESERVED
DDF0
RESET:
0
PFPAR — Port F Pin Assignment Register
$YFFA1F
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NOT USED
PFPA[7:6]
RESERVED
PFPA[1:0]
RESET:
8- AND 16-BIT EXPANDED MODES
DATA9 DATA9 DATA9 DATA9 DATA9 DATA9 DATA9 DATA9
SINGLE-CHIP MODE
0
Table 33 Port F Pin Assignments
PFPAR Field
Port F Signal
Alternate Signal
PFPA[7:6]1
PF[7:6]
IRQ[7:6]
PFPA[1:0]1
PF[1:0]
MODCLK2
Table 34 PFPAR Pin Functions
PFPAx Bits
Port F Signal
00
I/O pin without edge detect
01
Rising edge detect
10
Falling edge detect
11
Interrupt request
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關PDF資料
PDF描述
MC916X1CTH16B1 16-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP120
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