參數(shù)資料
型號: MC68HC916X1CTH16
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP120
封裝: QFP-120
文件頁數(shù): 153/172頁
文件大小: 1200K
代理商: MC68HC916X1CTH16
MC68HC916X1
MOTOROLA
MC68HC916X1TS/D
81
5.5 ADC Registers
The following section provides a summary of ADC registers and their contents.
The ADCMCR is used to initialize the ADC.
STOP — STOP Mode
0 = Normal operation
1 = Low-power operation
STOP places the ADC in low-power state by disabling the ADC clock and powering down the analog
circuitry. Setting STOP aborts any conversion in progress. STOP is set to logic level one at reset, and
may be cleared to logic level zero by the CPU.
Clearing STOP enables normal ADC operation. However, because analog circuitry bias current has
been turned off, there is a period of recovery before output stabilization.
FRZ[1:0] — FREEZE Assertion Response
The FRZ field is used to determine ADC response to assertion of the IMB FREEZE signal. Table 39
shows possible responses.
SUPV — Supervisor/Unrestricted Data Space
This bit has no effect because the CPU16 always operates in the supervisor mode.
ADTEST — ADC Test Register
$YFF702
ADTEST is used during factory test of the ADC.
Port ADA is an input port that shares pins with the A/D converter inputs.
PADA[7:6] — Port ADA Data Pins
PADA[7:6] digital inputs to the ADC module are internally connected to VSSA. The corresponding bits
in PORTADA will read zero at all times.
ADCMCR — ADC Module Configuration Register
$YFF700
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
STOP
FRZ[1:0]
NOT USED
SUPV
NOT USED
RESET:
1
0
Table 39 FREEZE Assertion Response
FRZ[1:0]
Response
00
Ignore FREEZE
01
Reserved
10
Finish conversion, then freeze
11
Freeze immediately
PORTADA — Port ADA Data Register
$YFF706
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NOT USED
PADA7 PADA6 PADA5 PADA4 PADA3 PADA2 PADA1 PADA0
RESET:
0
REFLECTS STATE OF THE INPUT PINS
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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PDF描述
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