參數(shù)資料
型號: MC68HC05G3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 84/128頁
文件大?。?/td> 290K
代理商: MC68HC05G3
Page 49
Section 5: RESET/ INTERRUPT STRUCTURE
MOTOROLA
MC68HC05G3 (705G4) Specification Rev. 1.1
5.2.2
KEY WAKEUP INTERRUPT (KWI)
There are eight key wakeup inputs (KWI0-7) which share pins with port B. Each key
wakeup input is enabled by a corresponding bit in the KWIEN register which resides in the
options map, and key wakeup interrupt (KWI) is enabled by the KWIE bit in the INTCR.
When a falling edge is detected at one of the enabled key wakeup inputs, the KWIF bit in
the INTSR is set and KWI is generated if KWIE = 1. Each input has a latch which responds
only to the falling edge at the pin, and all input latches are cleared at the same time by
clearing KWIF bit. Refer to Figure 5-3: Key Wakeup Interrupt (KWI).
Figure 5-3: Key Wakeup Interrupt (KWI)
D
C
Q
H
R
READ KWIF
KWIE0
KWI0
(PB0)
Q
R
S
KWIF
D
C
Q
H
R
KWIE1
KWI1
(PB1)
D
C
Q
H
R
KWIE7
KWI7
(PB7)
RESET/POD
KWI
Data
Bus
KWI2 to KWI6
Write 1 to RKWIF
KWIE
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