參數(shù)資料
型號: MC68HC05G3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 57/128頁
文件大小: 290K
代理商: MC68HC05G3
Page 24
MOTOROLA
Section 1: INTRODUCTION
MC68HC05G3 (705G4) Specification Rev. 1.1
1.5.2.3
OPEN DRAIN OUTPUT CONTROL REGISTER 1 (WOM1)
READ:
anytime
WRITE:
anytime
BITS 7-6
Reserved
These bits are not used and always return to zero.
HWOMH
Port H Open Drain Mode (H)
When this bit is set to one, upper four bits of port H are configured as open drain
outputs if corresponding DDRH bit is set to one. This bit is cleared on reset.
HWOML
Port H Open Drain Mode (L)
When this bit is set to one, the lower four bits of port H are configured as open
drain outputs if the corresponding DDRH bit is set to one. This bit is cleared on
reset.
GWOMH
Port G Open Drain Mode (H)
When this bit is set to one, the upper four bits of port G are configured as open
drain outputs if the corresponding DDRG bit is set to one. This bit is cleared on
reset.
GWOML
Port G Open Drain Mode (L)
When this bit is set to one, the lower four bits of port G are configured as open
drain outputs if the corresponding DDRG bit is set to one. This bit is cleared on
reset.
AWOMH
Port A Open Drain Mode (H)
When this bit is set to one, the upper four bits of port A are configured as open
drain outputs if the corresponding DDRA bit is set to one. This bit is cleared on
reset.
AWOML
Port E Open Drain Mode (L)
When this bit is set to one, the lower four bits of port A are configured as open
drain outputs if the corresponding DDRA bit is set to one. This bit is cleared on
reset.
B7
B6
B5
B4
B3
B2
B1
B0
00000000
RESET:
0
$000A
0
HWOMH HWOML GWOMH GWOML AWOMH AWOML
WOM1
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