參數(shù)資料
型號: MC68HC05G3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 73/128頁
文件大?。?/td> 290K
代理商: MC68HC05G3
Page 39
Section 4: CPU CORE
MOTOROLA
MC68HC05G3 (705G4) Specification Rev. 1.1
4.2.4
BIT MANIPULATION INSTRUCTIONS
The MCU is capable of setting or clearing any writable bit which resides in the first 256
bytes of the memory space where all port registers, port DDRs, timer, timer control, and on-
chip RAM reside. An additional feature allows the software to test and branch on the state
of any bit within these 256 locations. The bit set, bit clear and bit test, and branch functions
are all implemented with a single instruction. For test and branch instructions, the value of
the bit tested also is placed in the carry bit of the condition code register. These instructions
also are read-modify-write instructions. Do not bit manipulate write-only locations. Refer to
the following list for bit manipulation instructions.
4.2.5
CONTROL INSTRUCTIONS
These instructions are register reference instructions and are used to control processor
operation during program execution. Refer to the following list for control instructions.
Function
Branch if Bit n is Set
Branch if Bit n is Clear
Set Bit n
Clear Bit n
Mnemonic
BRSET n (n = 0. . .7)
BRCLR n (n = 0. . .7)
BSET n (n = 0. . .7)
BCLR n (n = 0. . .7)
Function
Transfer A to X
Transfer X to A
Set Carry Bit
Clear Carry Bit
Mnemonic
TAX
TXA
SEC
CLC
Set Interrupt Mask Bit
SEI
Clear Interrupt Mask Bit
CLI
Software Interrupt
SWI
Return from Subroutine
RTS
Return from Interrupt
RTI
Reset Stack Pointer
RSP
No-Operation
NOP
Wait
WAIT
Stop
STOP
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