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MOTOROLA
MC68HC05G3 (705G4) Specification Rev. 1.1
Figure 8-4:
Timer 2 Timing for f(PHI2) > f(TIMCLK) ................................................. 90
Figure 8-5:
Timer 2 Timing for f(PHI2) = f(TIMCLK) ................................................. 91
Figure 8-6:
Prescaler Block Diagram ........................................................................ 92
Figure 8-7:
EVI Block Diagram ................................................................................. 93
Figure 8-8:
EVI Timing Examples ............................................................................. 94
Figure 8-9:
VO Block Diagram .................................................................................. 95
Figure 8-10:
EVO Timing Example ............................................................................. 96
Figure 9-1:
PWM System Block Diagram ............................................................... 103
Figure 9-2:
WM Control Registers .......................................................................... 105
Figure 9-3:
PWM Duty Registers ............................................................................ 105
Figure 9-4:
PWM Waveform Examples (E = 2MHz; CLK = E/2)............................. 106
Figure 9-5:
PWM Counter ....................................................................................... 106
Figure 9-6:
PWM Timing for f(CLK3) = f(PHI2)....................................................... 107
Figure 9-7:
PWM Timing for f(CLK3) = f(PHI2)....................................................... 108
Figure 9-8:
PWM Timing for f(CLK3) < f(PHI2)....................................................... 109
Figure 9-9:
PWM Timing for f(CLK3) < f(PHI2 ........................................................ 110
Figure 10-1:
A/D Status and Control Register .......................................................... 112
Figure 10-2:
A/D Data Register................................................................................. 114