參數(shù)資料
型號: MC68HC05G3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 100/128頁
文件大?。?/td> 290K
代理商: MC68HC05G3
Page 63
Section 6: INPUT/OUTPUT PORTS
MOTOROLA
MC68HC05G3 (705G4) Specification Rev. 1.1
6.8
PORT H
Port H is an 8-bit bidirectional general-purpose port. The data direction of a port H pin is
determined by its corresponding DDRH bit.
When a bit is programmed as an output by the corresponding DDRH bit, data in the PORTH
data register becomes output data to the pin and it is returned for CPU read of PORTH
register. These outputs have the capability to drive10 mA sink current when (Vol
V
SS +
0.8 V).
Open drain or CMOS outputs are selected by HWOMH and HWOML bits in the WOM1
register. If the HWOMH bit is set, the P-channel drivers of output buffers of bit 7 through bit
4 are disabled (open drain). If the HWOML bit is set, the P-channel drivers of output buffers
of bit 3 through bit 0 are disabled (open drain).
When a bit is programmed as input by the corresponding DDRH bit, the pin level is read by
the CPU.
Port H has pullup resistors as an option. When the RHH or RHL bit in the RCR1 is set, the
pullup resistors are attached to the upper four bits or lower four bits of port H pins. (The
typical resistor values are to be 50 K
@ 3 V.) When a pin outputs a low level, the pullup
resistor is disconnected regardless of the states of RHH or RHL bits.
6.8.1
PORT H DATA REGISTER (PORTH)
READ:
anytime
(returns pin level if DDR set to input; returns output data latch if DDR set to
output)
WRITE:
anytime (data stored in an internal latch; drives pin only if DDR set for output)
RESET:
becomes high impedance inputs
PH7
$0007
PH6
PH5
PH4
PH3
PH2
PH1
PH0
PORTH
B7
B6
B5
B4
B3
B2
B1
B0
UUUUUUUU
RESET:
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