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參數(shù)資料
| 型號(hào)： | MC68HC05BS8FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁數(shù)： | 50/128頁 |
| 文件大?。?/td> | 752K |
| 代理商： | MC68HC05BS8FB |
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MOTOROLA
4-2
MC68HC05BS8
MEMORY AND REGISTERS
4
4.5
EEPROM
The EEPROM consists of 512 bytes, from $0200 to $03FF. A charge pump is built on the chip for
the operation of EEPROM. Programming and erasing are controlled by writing to the EEPROM
Control register at address $0007.
4.5.1
EEPROM Control Register
EEOSC - EEPROM Charge Pump Oscillator Enable
1 (set)
–
Internal oscillator turned on to clock the EEPROM charge pump.
It requires a time tRCON to stabilize. (Min. 1s).
0 (clear) –
Internal oscillator turned off. EEPROM charge pump clocked by
internal bus clock.
EER1, EER0 - EEPROM Erase Mode Select Bits
These two bits select one of the three erase modes. Refer to Table 4-1 below.
The EEPROM memory space is divided into two 256 byte blocks. Block 1 is located at address
$0200-$02FF, and block 2 is located at $0300-$03FF. Providing the EELAT and EEPGM bits are
“1”, the EER1 and EER0 bits indicate whether the access to the EEPROM is for an erase or
programming purpose. Block protect function applies on block 2 of the EEPROM memory space.
EELAT - EEPROM Programming Latch Control
1 (set)
–
EEPROM address and data bus congured for programming (writes
to EEPROM cause address and data to be latched). EEPROM is in
programming mode and cannot be read when this bit is set.
0 (clear) –
EEPROM address and data bus congured for normal reads. EER1,
EER0, and EEPGM are forced to “0”s.
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
EEPCR
$0007
EEOSC EER1
EER0 EELAT EEPGM 0000 0000
Table 4-1 Erase Mode Select
EER1
EER0
ERASE MODE
0
No erase
0
1
Byte erase
1
0
Block erase (block 1 or block 2)
1
Bulk erase (block 1 and block 2)
TPG
26
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