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參數(shù)資料
| 型號(hào)： | MC68HC05BS8FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁(yè)數(shù)： | 45/128頁(yè) |
| 文件大?。?/td> | 752K |
| 代理商： | MC68HC05BS8FB |
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MC68HC05BS8
MOTOROLA
3-1
INPUT/OUTPUT PORTS
3
INPUT/OUTPUT PORTS
The MC68HC05BS8 has 24 I/O lines, arranged as three 8-bit ports (Port A, B, and C). Each I/O
line is individually programmable as either input or output, under the software control of the Data
Direction registers. Port C also shares with keyboard interrupt and the software supported M-Bus
functions.
To avoid glitches on the output pins, data should be written to the I/O Port Data register before
writing “1”s to the corresponding Data Direction register bits to set the pins to output mode.
3.1
Input/Output Programming
Bidirectional port lines may be programmed as an input or an output under software control. The
direction of the pins is determined by the state of the corresponding bit in the port data direction
register (DDR). Each port has an associated DDR. Any I/O port pin is congured as an output if
its corresponding DDR bit is set to a logic one. A pin is congured as an input if its corresponding
DDR bit is cleared to a logic zero.
At power-on or reset, all DDRs are cleared, conguring all port pins as inputs. The data direction
registers are capable of being written to or read by the MCU. During the programmed output state,
a read of the data register actually reads the value of the output data latch and not the I/O pin. The
operation of the standard port hardware is shown schematically in Figure 3-1.
This is summarized in Table 3-1 which shows the effect of reading from or writing to an I/O pin in
various circumstances.
Table 3-1 I/O Pin Functions
R/W
DDR
I/O Pin Function
0
The I/O pin is in input mode. Data is written into the output data latch.
0
1
Data is written into the output data latch and output to the I/O pin.
1
0
The state of the I/O pin is read.
1
The I/O pin is in an output mode. The output data latch is read.
Note: R/W is an internal signal.
TPG
21
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