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| 型號(hào)： | MC68HC05BS8FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁(yè)數(shù)： | 106/128頁(yè) |
| 文件大?。?/td> | 752K |
| 代理商： | MC68HC05BS8FB |
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MC68HC05BS8
MOTOROLA
9-3
SYNC SIGNAL PROCESSOR
9
9.3
Sync Detection
The sync detector determines whether the incoming sync signal is active. Both sync high and low
pulse widths must be within the specic values to be regarded as active. The respective HDET
and/or VDET ags will be set if the HSYNC and VSYNC signals are active.
9.4
Free-running Pseudo Sync Signal Generator
If no active sync signals are detected, a free-running sync signal generator will be enabled. It
generates a pseudo vertical sync at 63.78Hz (1/(tCYC x 31360)) and a pseudo horizontal sync at
57.14KHz (1/(tCYC x 35)). This set of free running sync signals replaces the inactive sync signals
at the inputs and will be fed to the VTTL and HTTL pins if the pins are selected for VTTL and HTTL
function.
If both vertical and horizontal sync signals are detected (VDET and HDET are set), the SOUT bit
must be set in order to output the processed signals.
Figure 9-1 Sync Signal Polarity Correction
Negative polarity pure horizontal sync signal
Positive polarity pure horizontal sync signal
Negative polarity composite sync signal
Positive polarity composite sync signal
TPG
77
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